main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers ltc8542xs8: viewers · Ray 8d ago
ltc8542xs8-etched.glb Publish 0.1.0 · Ray 8d ago
ltc8542xs8-etched.step ltc8542xs8: factory component page (tier=lcsc) · Ray 8d ago
ltc8542xs8-hero.glb ltc8542xs8: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
ltc8542xs8-hero.overlay.json Publish 0.1.0 · Ray 8d ago
ltc8542xs8.glb Publish 0.1.0 · Ray 8d ago
ltc8542xs8.kicad_mod Publish 0.1.0 · Ray 8d ago
ltc8542xs8.kicad_sym Publish 0.1.0 · Ray 8d ago
ltc8542xs8.lbr Publish 0.1.0 · Ray 8d ago
ltc8542xs8.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

LTC8542XS8

Linearin · Operational Amplifier · SOIC-8L

LTC8542XS8 from Linearin, in a SOIC-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Amplifier A output.
2 -INA input Amplifier A inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V).
3 +INA input Amplifier A non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V).
4 -VS power_in Negative power supply; supply voltage VS+ to VS- must not exceed 10.0 V absolute maximum.
5 +INB input Amplifier B non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V).
6 -INB input Amplifier B inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V).
7 OUTB output Amplifier B output.
8 +VS power_in Positive power supply; operates 1.8 V to 5.5 V at 0 to 70 °C and 2.0 V to 5.5 V at -40 to +125 °C.

Key specifications

Parameter Value
Manufacturer Linearin
Package SOIC-8L
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -2.5 0.5 2.5 mV 3
Input offset voltage VOS -2.8 2.8 mV TA = −40 to +125 ℃ 3
Offset voltage drift VOS TC 1 3 μV/℃ TA = −40 to +125 ℃ 3
Power supply rejection ratio PSRR 80 110 dB VS = 2.0 to 5.5 V, VCM < VS+ − 2V 3
Power supply rejection ratio PSRR 75 dB TA = −40 to +125 ℃ 3
Input bias current IB 150 pA TA = +85 ℃ 3
Input bias current IB 500 pA TA = +125 ℃ 3
Common-mode rejection ratio CMRR 70 83 dB VS = 5.5 V, VCM = −0.1 to 5.6 V 3
Common-mode rejection ratio CMRR 65 dB VCM = 0 to 5.3 V, TA = −40 to +125 ℃ 3
Common-mode rejection ratio CMRR 65 77 dB VS = 2.0 V, VCM = −0.1 to 2.1 V 3
Common-mode rejection ratio CMRR 60 dB VCM = 0 to 1.8 V, TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 90 105 dB RL = 25 kΩ, VO = 0.05 to 3.5 V 3
Open-loop voltage gain AVOL 85 dB TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 85 100 dB RL = 2 kΩ, VO = 0.15 to 3.5 V 3
Open-loop voltage gain AVOL 80 dB TA = −40 to +125 ℃ 3
Short-circuit current, source ISC 45 mA Source current through 10Ω 4
Short-circuit current, sink ISC 55 mA Sink current through 10Ω 4
Operating supply voltage VS 1.8 5.5 V TA = 0 to +70 ℃ 4
Operating supply voltage VS 2 5.5 V TA = −40 to +125 ℃ 4
Quiescent current (per amplifier) IQ 75 125 μA 4
Quiescent current (per amplifier) IQ 160 μA TA = −40 to +125 ℃ 4
Operating temperature range TA -40 125 ℃ 4
Package thermal resistance, SOIC-8L θJA 125 ℃/W SOIC-8L 4
Supply voltage, VS+ to VS- VS+ to VS- 10 V 2
Signal input terminals current -10 10 mA Signal input terminals, voltage and current 2
Storage temperature range Tstg -65 150 ℃ 2
Junction temperature TJ 150 ℃ 2
Lead temperature range 260 ℃ Soldering 10 sec 2
Electrostatic discharge, human body model -5000 5000 V Human body model (HBM), per MIL-STD-883J / Method 3015.9 2
Electrostatic discharge, charged device model -2000 2000 V Charged device model (CDM), per ESDA/JEDEC JS-002-2014 2
Electrostatic discharge, machine model -250 250 V Machine model (MM), per JESD22-A115C 2

CAD (KiCad official)

  • Symbol: LTC8542XS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8L (KiCad packages3D, STEP)
  • 3D model files: ltc8542xs8-etched.step / ltc8542xs8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc8542xs8.step / ltc8542xs8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Linearin datasheet (20 pp, sha256 2f45044fde2eb4b8, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF