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Contents

README

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LTC8381XT5

Linearin(先积集成) · Precision Op Amps · SOT23-5L

LTC8381XT5 from Linearin(先积集成), in a SOT23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Amplifier output; the output is short-circuit continuous (ISC is 40 mA source and 50 mA sink through 10 Ω, typical).
2 -VS power_in Negative (lowest) power supply; signal input terminals must stay between VS- - 0.3 V and VS+ + 0.3 V, and VS+ to VS- must not exceed 10.0 V.
3 +IN input Non-inverting input of the amplifier; signal input voltage and current are limited to VS- - 0.3 V to VS+ + 0.3 V and ±10 mA.
4 -IN input Inverting input of the amplifier; signal input voltage and current are limited to VS- - 0.3 V to VS+ + 0.3 V and ±10 mA.
5 +VS power_in Positive (highest) power supply; VS+ to VS- must not exceed 10.0 V (absolute maximum), with operation specified from 1.8 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Linearin(先积集成)
Package SOT23-5L
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -50 10 50 μV VS=5.0 V, TA=+25 ℃, VCM=VS/2, VO=VS/2, RL=10 kΩ to VS/2 (table note) 3
Offset voltage drift VOS TC -0.15 0.02 0.15 μV/℃ TA = −40 to +125 ℃ 3
Power supply rejection ratio PSRR 103 112 dB VS = 2.0 to 5.5 V, VCM < VS+ − 2V 3
Power supply rejection ratio PSRR 96 dB TA = −40 to +125 ℃ 3
Input bias current IB -70 70 pA 3
Input bias current IB -150 150 pA TA = +85 ℃ 3
Input bias current IB -800 800 pA TA = +125 ℃ 3
Input offset current IOS -100 100 pA 3
Common-mode rejection ratio CMRR 92 110 dB VS = 5.5 V, VCM = −0.1 to 5.5 V 3
Common-mode rejection ratio CMRR 86 dB VCM = 0 to 5.2 V, TA = −40 to +125 ℃ 3
Common-mode rejection ratio CMRR 85 106 dB VS = 2.0 V, VCM = −0.1 to 2.0 V 3
Common-mode rejection ratio CMRR 79 dB VCM = 0 to 1.7 V, TA = −40 to +125 ℃ 3
Common-mode voltage range (min referenced to VS−, max referenced to VS+) VCM -0.1 0.1 V Printed as VS− − 0.1 V (min) and VS+ + 0.1 V (max); rail-referenced, not absolute voltages 3
Open-loop voltage gain AVOL 106 122 dB RL = 25 kΩ, VO = 0.05 to 3.5 V 3
Open-loop voltage gain AVOL 100 dB RL = 25 kΩ, VO = 0.05 to 3.5 V, TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 102 114 dB RL = 5 kΩ, VO = 0.15 to 3.5 V 3
Open-loop voltage gain AVOL 96 dB RL = 5 kΩ, VO = 0.15 to 3.5 V, TA = −40 to +125 ℃ 3
High output voltage swing (referenced to VS+) VOH -10 -5 mV RL = 25 kΩ 4
High output voltage swing (referenced to VS+) VOH -40 -25 mV RL = 5 kΩ 4
Low output voltage swing (referenced to VS−) VOL 4 8 mV RL = 25 kΩ 4
Low output voltage swing (referenced to VS−) VOL 16 30 mV RL = 5 kΩ 4
Short-circuit source current ISC 40 mA Source current through 10 Ω 4
Short-circuit sink current ISC 50 mA Sink current through 10 Ω 4
Operating supply voltage VS 1.8 5.5 V TA = −40 to +125 ℃ 4
Quiescent current (per amplifier) IQ 27 40 μA Per amplifier 4
Operating temperature range TA -40 125 ℃ 4
Package thermal resistance, SOT23-5L θJA 190 ℃/W SOT23-5L package 4
Supply voltage, VS+ to VS− VS 10 V 2
Signal input terminals voltage (referenced to rails) -0.3 0.3 V Printed as VS− − 0.3 V to VS+ + 0.3 V; rail-referenced 2
Signal input terminals current -10 10 mA 2
Storage temperature range Tstg -65 150 ℃ 2
Junction temperature TJ 150 ℃ 2
Lead temperature range (soldering) 260 ℃ Soldering 10 sec 2
ESD, human body model (HBM) -5000 5000 V Per MIL-STD-883J, Method 3015.9 2
ESD, charged device model (CDM) -2000 2000 V Per ESDA/JEDEC JS-002-2014 2
ESD, machine model (MM) -250 250 V Per JESD22-A115C 2

CAD (KiCad official)

  • Symbol: LTC8381XT5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT23-5L (KiCad packages3D, STEP)
  • 3D model files: ltc8381xt5-etched.step / ltc8381xt5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc8381xt5.step / ltc8381xt5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Linearin(先积集成) datasheet (18 pp, sha256 d1f3d2129196846d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF