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LTC7003HMSE#PBF

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Analog Devices Gate Drive ICs, MSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsltc7003hmse#pbffactory-2.0.0extractor-text

Verified LTC7003HMSE#PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 17 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LTC7003HMSE#PBF · MSOP-16-EP · 17 pins
  • ✓copper: 17 copper pads, none touching another net
  • ✓datasheet: all 17 pin names found in the 26-page datasheet
  • ✓distributor: lcsc C690099, digikey LTC7003HMSE#PBF-ND, mouser 584-LTC7003HMSEPBF
  • ✓family: MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-uuipk1wf/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 17 pins = 17 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 17 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ltc7003hmse-pbf.kicad_sym✓ ltc7003hmse-pbf.kicad_mod✓ ltc7003hmse-pbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers ltc7003hmse-pbf: viewers · Ray 8d ago
ltc7003hmse-pbf-etched.glb Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf-etched.step ltc7003hmse-pbf: factory component page (tier=mfr) · Ray 8d ago
ltc7003hmse-pbf-hero.glb ltc7003hmse-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
ltc7003hmse-pbf-hero.overlay.json Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf.glb Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf.kicad_mod Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf.kicad_sym Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf.lbr Publish 0.1.0 · Ray 8d ago
ltc7003hmse-pbf.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
verification.json Verified: Published by the parts factory: tier mfr, 17 pins · Ray 8d ago

LTC7003HMSE#PBF

Analog Devices · Gate Drive ICs · MSOP-16-EP

LTC7003HMSE#PBF from Analog Devices, in a MSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RUN input Run control input: a voltage above 1.21V enables normal operation, and forcing it below 0.7V shuts the device down to approximately 1µA quiescent current.
2 VIN power_in Main supply pin with an operating range of 3.5V to 60V, requiring a bypass capacitor of at least 0.1µF tied to GND.
3 VCC power_out Output of the internal LDO that powers the gate drivers and internal circuitry; decouple with at least 1.0µF low ESR ceramic and never connect it to a voltage greater than VIN.
4 VCCUV input Sets the gate drive VCC undervoltage lockout: a voltage of 0.4V to 1.5V is multiplied by 7, shorting to GND gives 3.5V and leaving it open gives 7.0V.
5 FAULT output Open-drain fault output that pulls low when the TIMER pin reaches the 1.3V fault threshold to indicate an impending turn-off, with a typical pull-down impedance of 200Ω.
6 TIMER input Fault timer input where a capacitor CT to GND sets the fault warning, fault turn-off and retry periods, and a pin voltage above 3.5V disables the timer function.
7 INP input CMOS-compatible input referenced to GND that sets the state of TGDN and TGUP, with an internal 1MΩ pull-down to GND to hold TGDN at TS during startup transients.
8 OVLO input Overvoltage lockout input: above 1.21V it pulls TGDN to TS, and normal operation resumes below 1.11V; tie to GND when not used.
9 ISET input Current trip threshold setting: a resistor to GND sets the peak current threshold, with the pin voltage clamped between 0.4V and 1.5V and divided by 20, and short to GND gives 20mV or open gives 30mV ΔVTH.
10 IMON output Current monitor output whose voltage equals the sense resistor voltage multiplied by 20, with a range of 0V to 1.5V referenced to GND.
11 TGDN output High-current gate driver pull-down that pulls to TS; tie it directly to the external high side MOSFET gate for the fastest turn-off.
12 TGUP output High-current gate driver pull-up that pulls to BST; tie it to TGDN for maximum transition speed, or add a resistor to the MOSFET gate to control turn-on inrush current.
13 TS power_in Top (high side) source connection, or GND in ground-referenced applications, with a TS operating voltage range of 0V to 60V.
14 BST power_out High-side bootstrapped supply with a swing of 12V to (VIN + 12V), requiring an external capacitor of at least 0.1µF between BST and TS.
15 SNS- input Current sense comparator input connected to the sense resistor through a minimum 100Ω resistor, with an SNS input voltage range of 3.5V to 60V.
16 SNS+ input Current sense comparator input connected with a Kelvin connection to the sense resistor, where the trip threshold ΔVTH equals the ISET voltage divided by 20 and is clamped between 20mV and 75mV.
17 GND power_in Exposed pad ground that must be soldered to the PCB for rated electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-16-EP
Category Power Management ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Input Voltage Operating Range VIN 3.5 60 V 4
TS Operating Voltage Range 0 60 V 4
SNS+/- Input Voltage Range 3.5 60 V Independent of VIN 4
SNS- Current 2 4 6.5 µA VINP = 4V, VRUN = 2V 4
VCC Undervoltage Lockout, VCC Rising 6.5 7 7.5 V VCCUV = OPEN, VIN = VCC 4
VCC Undervoltage Lockout, VCC Falling 5.8 6.4 6.9 V VCCUV = OPEN, VIN = VCC 4
VCC Undervoltage Lockout, VCC Rising 3.1 3.5 3.7 V VCCUV = 0V, VIN = VCC 4
VCC Undervoltage Lockout, VCC Falling 2.8 3.2 3.4 V VCCUV = 0V, VIN = VCC 4
VCC Undervoltage Lockout, VCC Rising 9.7 10.5 10.9 V VCCUV = 1.5V, VIN = VCC 4
VCC Undervoltage Lockout, VCC Falling 9.1 9.9 10.3 V VCCUV = 1.5V, VIN = VCC 4
VBST-TS, VTG Above VTS VBST-TS 9 11 14 V VINP = 3.5V (DC); VIN = VCC = VTS = 7V, IBST = 0µA 4
VBST-TS, VTG Above VTS VBST-TS 10 12 14 V VINP = 3.5V (DC); VIN = VCC = VTS = 10V, IBST = 0µA 4
Charge Pump Output Current -15 -30 µA VTS = 20V, VBST-TS = 10V 4
TG Pull-Up Resistance 2.2 7 Ω VIN = VBST = 12V 4
TG Pull-Down Resistance 1 4 Ω VIN = VBST = 12V 4
Input to Output Propagation Delay (rising) tPLH 35 70 ns VINP Rising, CL = 1nF 4
Input to Output Propagation Delay (falling) tPHL 35 70 ns VINP Falling, CL = 1nF 4
Input Threshold Voltage VIH VIH 1.7 2 2.2 V VINP Rising 5
Input Threshold Voltage VIL VIL 1.3 1.6 1.8 V VINP Falling 5
RUN and OVLO Pin Threshold Voltage 1.16 1.21 1.26 V Rising 5
RUN and OVLO Pin Threshold Voltage 1.05 1.1 1.15 V Falling 5
RUN and OVLO Leakage Current -100 0 100 nA VRUN = 1.3V, VOVLO = 1.3V 5
TIMER Threshold Voltage 1.25 1.3 1.35 V VTIMER Rising to VFAULT Going Low 5
TIMER Early Warning Voltage 75 100 125 mV VFAULT Going Low to (TG-TS) Going Low 5
TIMER Pin Fault Pull-Up Current -115 -100 -80 µA VTIMER = 1.0V, ISET = OPEN 5
TIMER Pin Pull-Down Current 2 2.5 3 µA VTIMER = 0.6V, ISET = OPEN, ΔVSNS = 0mV 5
FAULT Output Low Voltage 0.2 0.5 V IFAULT = 1mA 5
FAULT Leakage Current -100 0 100 nA VFAULT = 5V 5
Current Sense Threshold Voltage ΔVTH 22 30 36 mV ISET = OPEN 5
Current Sense Threshold Voltage ΔVTH 54 60 64 mV VISET = 1.2V 5
Current Sense Threshold Voltage ΔVTH 15 20 24 mV VISET = 0V 5
ISET and VCCUV Pull-Up Current -11.3 -10 -8.7 µA VISET = 1.0V, VCCUV = 1.0V 5
IMON Output Voltage 1.12 1.2 1.28 V ΔVSNS = 60mV, VTIMER = 0V, VINP = 3.5V 5
IMON Output Voltage 0.52 0.6 0.68 V ΔVSNS = 30mV, VTIMER = 0V, VINP = 3.5V 5
IMON Output Voltage 0 0.1 V ΔVSNS = 0mV, VTIMER = 0V, VINP = 3.5V 5
VIN VIN -0.3 65 V 3
BST-TS BST-TS -0.3 15 V 3
VCC VCC -0.3 15 V 3
BST Voltage BST -0.3 80 V 3
TS Voltage TS -6 65 V 3
RUN, SNS+ and SNS- Voltages RUN, SNS+, SNS- -0.3 65 V 3
SNS+ - SNS- -0.3 0.3 V Continuous 3
SNS+ - SNS- -100 100 mA <1msec 3
INP Voltage INP -6 15 V 3
TIMER, FAULT Voltages TIMER, FAULT -0.3 15 V 3
VCCUV, ISET, IMON, OVLO Voltages VCCUV, ISET, IMON, OVLO -0.3 6 V 3
Operating Junction Temperature Range -40 150 °C LTC7003H 3
Storage Temperature Range -65 150 °C 3
Lead Temperature (Soldering, 10 sec) 300 °C MSOP Package 3
Thermal Resistance, Junction to Ambient θJA 45 °C/W MSE package, TJMAX = 150°C 3
Thermal Resistance, Junction to Case θJC 10 °C/W MSE package, TJMAX = 150°C 3

CAD (KiCad official)

  • Symbol: LTC7003HMSE#PBF
  • Footprint: Package_SO:MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • 3D model: MSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: ltc7003hmse-pbf-etched.step / ltc7003hmse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc7003hmse-pbf.step / ltc7003hmse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 2a6f3768fe4b822e, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF