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LTC7001IMSE#PBF

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Analog Devices Gate Drive ICs, MSOP-10-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC7001IMSE#PBF

Analog Devices · Gate Drive ICs · MSOP-10-EP

LTC7001IMSE#PBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Main gate driver supply pin, operating from 3.5V to 15V, with a bypass capacitor of at least 0.1µF tied between this pin and GND.
2 VCCUV passive Sets the VCC undervoltage lockout through a resistor to ground, where 0.5V to 1.5V on this pin is multiplied by seven; shorting to ground gives a 3.5V UVLO and leaving it open gives 7.0V.
3 GND power_in Ground reference for the device, which must be connected to the PCB ground plane.
4 INP input CMOS-compatible input referenced to GND that sets the state of TGDN and TGUP, with an internal 1MΩ pull-down to GND and an absolute maximum range of -6V to 15V.
5 OVLO input Overvoltage lockout input that pulls TGDN to TS when above 1.21V and resumes normal operation below 1.11V, with an absolute maximum of 6V and to be tied to GND when unused.
6 TGDN output High current gate driver pull-down that pulls the external MOSFET gate to TS, and should be tied directly to the gate for the fastest turn-off.
7 TGUP output High current gate driver pull-up that pulls the external MOSFET gate up to BST, to be tied to TGDN for maximum transition speed or used with a series resistor to control turn-on inrush current.
8 TS power_in Top (high side) source connection operating from 0V to 135V, tolerant to -6V and rated to 150V absolute maximum, or tied to GND in ground-referenced applications.
9 BST power_in High side bootstrapped supply pin with a swing of 12V to (VTS + 12V), requiring an external capacitor of at least 0.1µF between BST and TS.
10 NC unconnected No connect pin that should be left floating.
11 GND power_in Exposed pad is ground and must be soldered to the PCB for rated electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10-EP
Category Power Management ICs
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
BST-TS supply voltage -0.3 15 V 2
VCC supply voltage -0.3 15 V 2
TS voltage -6 150 V 2
BST voltage -0.3 150 V 2
INP voltage -6 15 V 2
VCCUV voltage -0.3 6 V 2
OVLO voltage -0.3 6 V 2
Operating junction temperature range (LTC7001I) -40 125 °C LTC7001I grade 2
Storage temperature range -65 150 °C 2
Lead temperature (soldering, 10 sec), MSOP package 300 °C Soldering, 10 sec 2
TS operating voltage range 0 135 V 3
VCC supply current, ON mode 27 50 µA VBST-TS = 13V, VINP = 4V 3
VCC supply current, Sleep mode 27 50 µA VBST-TS = 13V, VINP = 0.4V 3
Total supply current (ON or Sleep, charge pump regulating) 225 µA VBST=OPEN, VTS=12V 3
VCC UVLO rising (VCCUV = OPEN) 6.5 7 7.5 V VCCUV = OPEN, VCC rising 3
VCC UVLO falling (VCCUV = OPEN) 5.8 6.4 6.9 V VCCUV = OPEN, VCC falling 3
VCC UVLO rising (VCCUV = 0V) 3.1 3.5 3.7 V VCCUV = 0V, VCC rising 3
VCC UVLO falling (VCCUV = 0V) 2.8 3.2 3.4 V VCCUV = 0V, VCC falling 3
VCC UVLO rising (VCCUV = 1.5V) 9.7 10.5 10.9 V VCCUV = 1.5V, VCC rising 3
VCC UVLO falling (VCCUV = 1.5V) 9.1 9.9 10.3 V VCCUV = 1.5V, VCC falling 3
VBST-TS VTG above VTS (VCC = VTS = 7V) VBST-TS 9 11 14 V INP = 3V (DC), VCC = VTS = 7V, IBST = 0µA 3
VBST-TS VTG above VTS (VCC = VTS = 10V) VBST-TS 10 12 14 V INP = 3V (DC), VCC = VTS = 10V, IBST = 0µA 3
VBST-TS VTG above VTS (VTS = 135V) VBST-TS 10 12 14 V INP = 3V (DC), VTS = 135V, IBST = 0µA 3
Charge pump output current -15 -30 µA VTS = 20V, VBST-TS = 10V 3
TG pull-up resistance 2.2 7 Ω VCC = VBST = 12V 3
TG pull-down resistance 1 4 Ω VCC = VBST = 12V 3
Input to output propagation delay, rising tPLH 35 70 ns VINP rising, CL = 1nF 3
Input to output propagation delay, falling tPHL 35 70 ns VINP falling, CL = 1nF 3
Input threshold voltage, rising VIH 1.7 2 2.2 V VINP rising 3
Input threshold voltage, falling VIL 1.3 1.6 1.8 V VINP falling 3
OVLO pin threshold voltage, rising 1.16 1.21 1.26 V OVLO rising 3
OVLO pin threshold voltage, falling 1.05 1.1 1.15 V OVLO falling 3
OVLO pin leakage current -100 0 100 nA VOVLO = 1.3V 3
VVCCUV pull-up current -11.3 -10 8.7 µA VVCCUV = 1V 3
Thermal resistance, junction to ambient θJA 45 °C/W MSE package 2
Thermal resistance, junction to case θJC 10 °C/W MSE package 2
Maximum junction temperature TJMAX 150 °C 2

CAD (KiCad official)

  • Symbol: LTC7001IMSE#PBF
  • Footprint: Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
  • 3D model: MSOP-10-EP (KiCad packages3D, STEP)
  • 3D model files: ltc7001imse-pbf-etched.step / ltc7001imse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc7001imse-pbf.step / ltc7001imse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 2fc8d931da744f5d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF