main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers ltc7001hmse-trpbf: viewers · Ray 10d ago
ltc7001hmse-trpbf-etched.glb Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf-etched.step ltc7001hmse-trpbf: factory component page (tier=mfr) · Ray 10d ago
ltc7001hmse-trpbf-hero.glb ltc7001hmse-trpbf: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
ltc7001hmse-trpbf-hero.overlay.json Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf.glb Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf.kicad_mod Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf.kicad_sym Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf.lbr Publish 0.1.0 · Ray 10d ago
ltc7001hmse-trpbf.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago

LTC7001HMSE#TRPBF

Analog Devices · Gate Drive ICs · MSOP-10-EP

LTC7001HMSE#TRPBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Main supply pin that requires a bypass capacitor of at least 0.1µF to GND, with the gate driver supply specified from 3.5V to 15V.
2 VCCUV input VCC undervoltage lockout set pin where 0.5V to 1.5V on this pin is multiplied by seven to set the gate drive UVLO, shorted to ground for 3.5V and left open for 7.0V.
3 GND power_in Ground reference that must be connected to the exposed pad soldered to the PCB for rated electrical and thermal performance.
4 INP input CMOS compatible input referenced to GND that controls TGUP and TGDN, with an absolute maximum range of -6V to 15V and an internal 1MΩ pull-down.
5 OVLO input Overvoltage lockout input where a voltage above 1.21V pulls TGDN to TS and normal operation resumes below 1.11V, with an absolute maximum of 6V.
6 TGDN output High current gate driver pull-down that pulls the external MOSFET gate to TS, with a typical pull-down resistance of 1Ω.
7 TGUP output High current gate driver pull-up that pulls the external MOSFET gate to BST, with a typical pull-up resistance of 2.2Ω.
8 TS power_in High side source connection of the external MOSFET, operating from 0V to 135V and tolerant down to -6V.
9 BST power_in High side bootstrapped supply requiring an external capacitor of at least 0.1µF to TS, with a swing from 12V to (VTS + 12V).
10 NC unconnected No connect pin that should be left floating.
11 GND power_in Exposed pad that is GND and must be soldered to the PCB for rated electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10-EP
Category Power Management ICs
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage BST-TS -0.3 15 V 2
Supply Voltage VCC VCC -0.3 15 V 2
TS Voltage TS -6 150 V 2
BST Voltage BST -0.3 150 V 2
INP Voltage INP -6 15 V 2
VCCUV Voltage VCCUV -0.3 6 V 2
OVLO Voltage OVLO -0.3 6 V 2
Operating Junction Temperature Range (LTC7001H) TJ -40 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (MSOP Package) 300 °C Soldering, 10 sec 2
Gate Driver Supply VCC VCC 3.5 15 V Gate driver supply 1
TS Operating Voltage Range 0 135 V 3
Total Supply Current 225 µA ON or Sleep, charge pump regulating, VBST=OPEN, VTS=12V 3
VCC Supply Current ON Mode 27 50 µA ON mode, VBST-TS = 13V, VINP = 4V 3
VCC Supply Current Sleep Mode 27 50 µA Sleep mode, VBST-TS = 13V, VINP = 0.4V 3
VCC Undervoltage Lockout Rising (VCCUV open) 6.5 7 7.5 V VCCUV = OPEN, VCC rising 3
VCC Undervoltage Lockout Falling (VCCUV open) 5.8 6.4 6.9 V VCCUV = OPEN, VCC falling 3
VCC Undervoltage Lockout Hysteresis (VCCUV open) 600 mV VCCUV = OPEN 3
VCC Undervoltage Lockout Rising (VCCUV = 0V) 3.1 3.5 3.7 V VCCUV = 0V, VCC rising 3
VCC Undervoltage Lockout Falling (VCCUV = 0V) 2.8 3.2 3.4 V VCCUV = 0V, VCC falling 3
VCC Undervoltage Lockout Hysteresis (VCCUV = 0V) 300 mV VCCUV = 0V 3
VCC Undervoltage Lockout Rising (VCCUV = 1.5V) 9.7 10.5 10.9 V VCCUV = 1.5V, VCC rising 3
VCC Undervoltage Lockout Falling (VCCUV = 1.5V) 9.1 9.9 10.3 V VCCUV = 1.5V, VCC falling 3
VCC Undervoltage Lockout Hysteresis (VCCUV = 1.5V) 600 mV VCCUV = 1.5V 3
Bootstrapped Supply VBST-TS VBST-TS 9 11 14 V VTG above VTS, INP = 3V DC, VCC = VTS = 7V, IBST = 0µA 3
Bootstrapped Supply VBST-TS VBST-TS 10 12 14 V VTG above VTS, INP = 3V DC, VCC = VTS = 10V, IBST = 0µA 3
Charge Pump Output Current -15 -30 µA VTS = 20V, VBST-TS = 10V 3
BST-TS Floating UVLO Rising 3.1 V VBST-TS rising 3
BST-TS Floating UVLO Falling 2.8 V VBST-TS falling 3
TG Pull-Up Resistance 2.2 7 Ω VCC = VBST = 12V 3
TG Pull-Down Resistance 1 4 Ω VCC = VBST = 12V 3
Output Rise Time tr tr 13 ns 10% to 90%, CL = 1nF 3
Output Rise Time tr tr 90 ns 10% to 90%, CL = 10nF 3
Output Fall Time tf tf 13 ns 10% to 90%, CL = 1nF 3
Output Fall Time tf tf 40 ns 10% to 90%, CL = 10nF 3
Input to Output Propagation Delay Rising tPLH 35 70 ns VINP rising, CL = 1nF 3
Input to Output Propagation Delay Falling tPHL 35 70 ns VINP falling, CL = 1nF 3
Input Threshold Voltage Rising VIH 1.7 2 2.2 V VINP rising 3
Input Threshold Voltage Falling VIL 1.3 1.6 1.8 V VINP falling 3
Input Threshold Hysteresis 400 mV 3
Input Pull-Down Resistance 1 MΩ VINP = 1V 3
OVLO Pin Threshold Voltage Rising 1.16 1.21 1.26 V Rising 3
OVLO Pin Threshold Voltage Falling 1.05 1.1 1.15 V Falling 3
OVLO Pin Threshold Hysteresis 110 mV 3
OVLO Pin Leakage Current -100 0 100 nA VOVLO = 1.3V 3
VVCCUV Pull-Up Current -11.3 -10 8.7 µA VVCCUV = 1V 3
Thermal Resistance Junction-to-Ambient θJA 45 °C/W MSOP package 2
Thermal Resistance Junction-to-Case θJC 10 °C/W MSOP package 2

CAD (KiCad official)

  • Symbol: LTC7001HMSE#TRPBF
  • Footprint: Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
  • 3D model: MSOP-10-EP (KiCad packages3D, STEP)
  • 3D model files: ltc7001hmse-trpbf-etched.step / ltc7001hmse-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc7001hmse-trpbf.step / ltc7001hmse-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 2fc8d931da744f5d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF