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LTC6752HSC6-1#TRMPBF

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Analog Devices Pre-ordered Chips, SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC6752HSC6-1#TRMPBF

Analog Devices · Pre-ordered Chips · SC-70-6

LTC6752HSC6-1#TRMPBF from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q output Comparator output: Q is driven high when +IN > -IN and driven low when +IN < -IN.
2 VEE power_in Negative power supply, normally tied to ground; total supply VCC to VEE is 2.45V to 3.5V for the LTC6752-1.
3 +IN input Positive input of the comparator; the voltage range of this pin can go from VEE to VCC.
4 -IN input Negative input of the comparator; the voltage range of this pin can go from VEE to VCC.
5 LE/HYST input Adjusts hysteresis and latches the output when the pin is taken within 300mV above VEE; leaving it unconnected gives a typical hysteresis of 5mV.
6 VCC power_in Positive supply voltage for the LTC6752-1, with total supply from 2.45V to 3.5V relative to VEE.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SC-70-6
Category Interface ICs
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Current (Q, Q) -50 50 mA Note 3 2
Input Current (+IN, -IN, SHDN, LE/HYST) -10 10 mA Note 2 2
Storage Temperature Range -65 125 °C 2
Maximum Junction Temperature TJMAX 150 °C Note 3 2
Lead Temperature Soldering 300 °C 10s 2
Specified Temperature Range LTC6752H -40 125 °C LTC6752H, Note 4 2
VCC - VEE Supply Voltage VCC - VEE 2.45 3.5 V LTC6752/LTC6752-1 (Total Supply), VCC = VDD = 2.5V table 3
Input Offset Voltage VOS -5.5 5.5 mV Note 6, VCC = VDD = 2.5V 3
Input Hysteresis Voltage VHYST 5 mV LE/HYST Pin Floating 3
Input Offset Voltage Drift TCVOS 18 µV/°C 3
Input Bias Current IB -3.8 -1.35 µA VCM = VEE + 0.3V 3
Input Bias Current IB 0.3 1.25 2.1 µA VCM = VCC, 0.3V 3
Input Offset Current IOS -0.75 0.75 µA 3
Common Mode Rejection Ratio, Low VCM Region CMRR_LVCM 51 69 dB VCM = VEE, 0.2V to VCC, 1.5V 3
Common Mode Rejection Ratio (Extreme Ends of VCMR) CMRR_FR 50 65 dB VCM = VEE, 0.2V to VCC + 0.1V 3
Total Power Supply Rejection Ratio PSRR 53 73 dB VCM = 0.3V, VCC varied from 2.45V to 3.5V (LTC6752/LTC6752-1) 4
Output High Voltage VOH 130 260 340 mV ISOURCE = 8mA 4
Output Low Voltage (Referred to VEE) VOL 200 340 400 mV ISINK = 8mA 4
Output Short-Circuit Current Source ISC 16 30 mA Source 4
Output Short-Circuit Current Sink ISC 15 22 mA Sink 4
Open Loop Gain AVOL 6000 V/V LTC6752-1/LTC6752-2/LTC6752-3, Hysteresis Removed (Note 12) 4
VCC Supply Current, Device On IVCC 4.5 5 5.9 mA LTC6752/LTC6752-1 4
Total Supply Current, Device On ITOTAL 4.5 5 5.9 mA LTC6752/LTC6752-1/LTC6752-2/LTC6752-4 4
Rise/Fall Time tR, tF 1.2 ns 10% to 90% 4
Propagation Delay tPD 2.9 5 ns VOVERDRIVE = 50mV 4
Propagation Delay Skew, Rising to Falling Transition tSKEW 300 ps Note 9 4
Overdrive Dispersion tODD 1.8 ns Overdrive varied from 10mV to 125mV 4
Common Mode Dispersion tCMD 240 ps VCM varied from VEE, 0.2V to VCC + 0.1V 4
Toggle Rate TR 280 MHz 100mVP-P input, LTC6752/LTC6752-1/LTC6752-2/LTC6752-4 (Note 11) 4
RMS Jitter tJITTER 4.5 ps VIN = 100mVP-P, fIN = 100MHz, Jitter BW = 10Hz, 50MHz 4
LE/HYST Pin Voltage Open Circuit VLE/HYST 1.05 1.25 1.45 V Open circuit 5
Resistance Looking Into LE/HYST RHYST 15 20 25 kΩ LE/HYST pin voltage < open circuit value 5
Hysteresis Voltage VHYST_LARGE 40 mV VLE/HYST = 800mV 5
Latch Pin Voltage, Latch Guaranteed VIL_LE 0.3 V 5
Latch Pin Voltage, Hysteresis Disabled Output Not Latched VIH_LE 1.7 V 5
Latch Pin Current High IIH_LE 30 72 µA VLE/HYST = 1.7V 5
Latch Pin Current Low IIL_LE -70 -47 µA VLE/HYST = 0.3V 5
Latch Setup Time tSETUP -2 ns Note 10 5
Latch Hold Time tHOLD 2 ns Note 10 5
Latch to Output Delay tPL 7 ns 5
VCC - VEE Supply Voltage (3.3V table) VCC - VEE 2.45 3.5 V LTC6752/LTC6752-1 (Total Supply), VCC = VDD = 3.3V table 6
Input Offset Voltage (3.3V table) VOS -5.5 5.5 mV Note 6, VCC = VDD = 3.3V 6
Common Mode Rejection Ratio, Low VCM Region (3.3V) CMRR_LVCM 52 70 dB VCM = VEE, 0.2V to VCC, 1.5V 6
Common Mode Rejection Ratio (Extreme Ends of VCMR) (3.3V) CMRR_FR 50 66 dB VCM = VEE, 0.2V to VCC + 0.1V 6
Total Power Supply Rejection Ratio (3.3V) PSRR 53 73 dB VCM = 0.3V, VCC varied from 2.45V to 3.5V (LTC6752/LTC6752-1) 6
Open Loop Gain (3.3V) AVOL 7000 V/V LTC6752-1/LTC6752-2/LTC6752-3, Hysteresis Removed (Note 12) 6
Output High Voltage (3.3V) VOH 81 200 300 mV ISOURCE = 8mA 6
Output Low Voltage (3.3V) VOL 155 320 350 mV ISINK = 8mA 6
Total Supply Current, Device On (3.3V) ITOTAL 4.8 5.8 6.2 mA LTC6752/LTC6752-1/LTC6752-2/LTC6752-4 6

CAD (KiCad official)

  • Symbol: LTC6752HSC6-1#TRMPBF
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SC-70-6 (KiCad packages3D, STEP)
  • 3D model files: ltc6752hsc6-1-trmpbf-etched.step / ltc6752hsc6-1-trmpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc6752hsc6-1-trmpbf.step / ltc6752hsc6-1-trmpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (30 pp, sha256 d0e3d938d1b220ae, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF