# LTC6655CHMS8-4.096#PBF

**Analog Devices** · Voltage References · MSOP-8

LTC6655CHMS8-4.096#PBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHDN | input | Active-low shutdown input powers the device down to below 20µA; if left open an internal pull-up keeps the part in normal operation, and tying it high externally is recommended for best performance. |
| 2 | VIN | power_in | Power supply input that should be bypassed with a 0.1µF or larger capacitor to GND, with a maximum supply voltage of 13.2V. |
| 3 | GND | power_in | Internal function ground pin that must be grounded. |
| 4 | GND | power_in | Main device ground that must be connected to a noise-free ground plane, with all GND connections starred at this pin. |
| 5 | GND | power_in | Internal function ground pin that must be grounded. |
| 6 | VOUT_S | output | Output sense pin to be connected at the load with a wide trace; it sinks 2mA, giving an output error of RTRACE × 2mA, and for load currents below 100µA it is tied directly to VOUT_F. |
| 7 | VOUT_F | power_out | Output force pin that sources and sinks load current and requires an output capacitor of 2.7µF to 100µF. |
| 8 | GND | power_in | Internal function ground pin that must be grounded. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Initial Accuracy | VOUT | -0.05 |  | 0.05 | % | LTC6655C | 5 |
| Output Voltage Temperature Coefficient |  |  | 2.5 | 5 | ppm/°C | LTC6655C; l = full operating temperature range | 5 |
| Line Regulation |  |  | 5 | 25 | ppm/V | VOUT + 0.5V ≤ VIN ≤ 13.2V, SHDN = 2V; l | 5 |
| Load Regulation (sourcing) |  |  | 3 | 15 | ppm/mA | ISOURCE = 5mA, LTC6655MS8; l | 5 |
| Load Regulation (sinking) |  |  | 10 | 30 | ppm/mA | ISINK = 5mA, LTC6655MS8; l | 5 |
| Operating Voltage | VIN |  |  | 13.2 | V | ISOURCE = ±5mA, VOUT Error ≤ 0.1%; l; min = VOUT + 0.5V | 5 |
| Output Short-Circuit Current |  |  | 20 |  | mA | Short VOUT to GND | 5 |
| Shutdown Pin (SHDN) Logic High Input Voltage |  | 2 |  |  | V | l | 5 |
| Logic High Input Current |  |  |  | 12 | µA | SHDN = 2V; l | 5 |
| Logic Low Input Voltage |  |  |  | 0.8 | V | l | 5 |
| Logic Low Input Current |  |  |  | 15 | µA | SHDN = 0.8V; l | 5 |
| Supply Current |  |  | 5 | 7 | mA | No Load | 5 |
| Supply Current |  |  |  | 7.5 | mA | No Load; l | 5 |
| Shutdown Current |  |  |  | 20 | µA | SHDN tied to GND; l | 5 |
| Output Capacitor (COUT) | COUT | 2.7 |  | 100 | µF | Required output capacitor range | 12 |
| Supply Voltage (VIN) Absolute Maximum | VIN | -0.3 |  | 13.2 | V | VIN to GND | 2 |
| Output Voltage Absolute Maximum (VOUT_S) | VOUT_S | -0.3 |  | 6 | V |  | 2 |
| Operating Temperature Range |  | -40 |  | 125 | °C | Operating Temperature Range (Note 2) | 2 |
| Storage Temperature Range |  | -65 |  | 150 | °C | Storage Temperature Range (Note 2) | 2 |
| Lead Temperature (Soldering, 10 sec) |  |  |  | 300 | °C | Soldering, 10 sec (Note 3) | 2 |
| Maximum Junction Temperature | TJMAX |  |  | 150 | °C |  | 2 |
| Thermal Resistance, Junction to Ambient (MS8) | θJA |  | 300 |  | °C/W | MS8 package | 2 |
| Nominal Output Voltage | VOUT |  | 4.096 |  | V | LTC6655-4.096 option | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs |  | Plastic mould compounds absorb water. With changes in | 16 |

## CAD (KiCad official)

- Symbol: `LTC6655CHMS8-4.096#PBF`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ltc6655chms8-4-096-pbf-etched.step` / `ltc6655chms8-4-096-pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc6655chms8-4-096-pbf.step` / `ltc6655chms8-4-096-pbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/LTC6655-6655LN.pdf) (30 pp, sha256 `f4788bedb0735838`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ltc6655chms8-4-096-pbf-datasheet.pdf)