component
LTC6002XS8
Public Made by Adomby adom
Linearin Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTC6002XS8
Linearin · Operational Amplifier · SOIC-8
LTC6002XS8 from Linearin, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input; voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 3 | +INA | input | Amplifier A non-inverting input; same voltage range as -IN, (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 4 | -VS | power_in | Negative power supply. |
| 5 | +INB | input | Amplifier B non-inverting input; same voltage range as -IN, (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 6 | -INB | input | Amplifier B inverting input; voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 7 | OUTB | output | Amplifier B output. |
| 8 | +VS | power_in | Positive power supply; 1.8 V to 5.5 V at 0 to 70 °C, 2.0 V to 5.5 V over −40 to +125 °C, absolute maximum 10.0 V between VS+ and VS-. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage (TA = 0 to +70 ℃) | VS | 1.8 | 5.5 | V | TA = 0 to +70 ℃ | 4 | |
| Operating supply voltage (TA = −40 to +125 ℃) | VS | 2 | 5.5 | V | TA = −40 to +125 ℃ | 4 | |
| Operating temperature range | TA | -40 | 125 | ℃ | 4 | ||
| Quiescent current (per amplifier) | IQ | 75 | 125 | μA | 4 | ||
| Quiescent current (per amplifier), TA = −40 to +125 ℃ | IQ | 160 | μA | TA = −40 to +125 ℃ | 4 | ||
| Input offset voltage | VOS | 0.5 | 2.5 | mV | 3 | ||
| Input offset voltage, TA = −40 to +125 ℃ | VOS | 2.8 | mV | TA = −40 to +125 ℃ | 3 | ||
| Offset voltage drift | VOS TC | 1 | 3 | μV/℃ | TA = −40 to +125 ℃ | 3 | |
| Power supply rejection ratio | PSRR | 80 | 110 | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 | |
| Power supply rejection ratio, TA = −40 to +125 ℃ | PSRR | 75 | dB | TA = −40 to +125 ℃ | 3 | ||
| Common-mode rejection ratio (VS = 5.5 V) | CMRR | 70 | 83 | dB | VS = 5.5 V, VCM = −0.1 to 5.6 V | 3 | |
| Common-mode rejection ratio, TA = −40 to +125 ℃ | CMRR | 65 | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 | ||
| Common-mode rejection ratio (VS = 2.0 V) | CMRR | 65 | 77 | dB | VS = 2.0 V, VCM = −0.1 to 2.1 V | 3 | |
| Common-mode rejection ratio, TA = −40 to +125 ℃ (VS = 2.0 V) | CMRR | 60 | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 | ||
| Open-loop voltage gain (RL = 25 kΩ) | AVOL | 90 | 105 | dB | RL = 25 kΩ, VO = 0.05 to 3.5 V | 3 | |
| Open-loop voltage gain (RL = 25 kΩ), TA = −40 to +125 ℃ | AVOL | 85 | dB | TA = −40 to +125 ℃ | 3 | ||
| Open-loop voltage gain (RL = 2 kΩ) | AVOL | 85 | 100 | dB | RL = 2 kΩ, VO = 0.15 to 3.5 V | 3 | |
| Open-loop voltage gain (RL = 2 kΩ), TA = −40 to +125 ℃ | AVOL | 80 | dB | TA = −40 to +125 ℃ | 3 | ||
| Supply voltage VS+ to VS− | VS | 10 | V | 2 | |||
| Signal input terminals current | -10 | 10 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 2 | ||
| Junction temperature | TJ | 150 | ℃ | 2 | |||
| Lead temperature range (soldering) | 260 | ℃ | Soldering 10 sec | 2 | |||
| ESD Human body model (HBM) | -5000 | 5000 | V | MIL-STD-883J / Method 3015.9 | 2 | ||
| ESD Charged device model (CDM) | -2000 | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 | ||
| ESD Machine model (MM) | -250 | 250 | V | JESD22-A115C | 2 | ||
| Package thermal resistance, SOIC-8L | θJA | 125 | ℃/W | 4 |
CAD (KiCad official)
- Symbol:
LTC6002XS8 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ltc6002xs8-etched.step/ltc6002xs8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc6002xs8.step/ltc6002xs8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Linearin datasheet (20 pp, sha256
befc1d028f16941d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC6002XS8
**Linearin** · Operational Amplifier · SOIC-8
LTC6002XS8 from Linearin, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input; voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 3 | +INA | input | Amplifier A non-inverting input; same voltage range as -IN, (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 4 | -VS | power_in | Negative power supply. |
| 5 | +INB | input | Amplifier B non-inverting input; same voltage range as -IN, (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 6 | -INB | input | Amplifier B inverting input; voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 7 | OUTB | output | Amplifier B output. |
| 8 | +VS | power_in | Positive power supply; 1.8 V to 5.5 V at 0 to 70 °C, 2.0 V to 5.5 V over −40 to +125 °C, absolute maximum 10.0 V between VS+ and VS-. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage (TA = 0 to +70 ℃) | VS | 1.8 | | 5.5 | V | TA = 0 to +70 ℃ | 4 |
| Operating supply voltage (TA = −40 to +125 ℃) | VS | 2 | | 5.5 | V | TA = −40 to +125 ℃ | 4 |
| Operating temperature range | TA | -40 | | 125 | ℃ | | 4 |
| Quiescent current (per amplifier) | IQ | | 75 | 125 | μA | | 4 |
| Quiescent current (per amplifier), TA = −40 to +125 ℃ | IQ | | | 160 | μA | TA = −40 to +125 ℃ | 4 |
| Input offset voltage | VOS | | 0.5 | 2.5 | mV | | 3 |
| Input offset voltage, TA = −40 to +125 ℃ | VOS | | | 2.8 | mV | TA = −40 to +125 ℃ | 3 |
| Offset voltage drift | VOS TC | | 1 | 3 | μV/℃ | TA = −40 to +125 ℃ | 3 |
| Power supply rejection ratio | PSRR | 80 | 110 | | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 |
| Power supply rejection ratio, TA = −40 to +125 ℃ | PSRR | 75 | | | dB | TA = −40 to +125 ℃ | 3 |
| Common-mode rejection ratio (VS = 5.5 V) | CMRR | 70 | 83 | | dB | VS = 5.5 V, VCM = −0.1 to 5.6 V | 3 |
| Common-mode rejection ratio, TA = −40 to +125 ℃ | CMRR | 65 | | | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 |
| Common-mode rejection ratio (VS = 2.0 V) | CMRR | 65 | 77 | | dB | VS = 2.0 V, VCM = −0.1 to 2.1 V | 3 |
| Common-mode rejection ratio, TA = −40 to +125 ℃ (VS = 2.0 V) | CMRR | 60 | | | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain (RL = 25 kΩ) | AVOL | 90 | 105 | | dB | RL = 25 kΩ, VO = 0.05 to 3.5 V | 3 |
| Open-loop voltage gain (RL = 25 kΩ), TA = −40 to +125 ℃ | AVOL | 85 | | | dB | TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain (RL = 2 kΩ) | AVOL | 85 | 100 | | dB | RL = 2 kΩ, VO = 0.15 to 3.5 V | 3 |
| Open-loop voltage gain (RL = 2 kΩ), TA = −40 to +125 ℃ | AVOL | 80 | | | dB | TA = −40 to +125 ℃ | 3 |
| Supply voltage VS+ to VS− | VS | | | 10 | V | | 2 |
| Signal input terminals current | | -10 | | 10 | mA | | 2 |
| Storage temperature range | Tstg | -65 | | 150 | ℃ | | 2 |
| Junction temperature | TJ | | | 150 | ℃ | | 2 |
| Lead temperature range (soldering) | | | | 260 | ℃ | Soldering 10 sec | 2 |
| ESD Human body model (HBM) | | -5000 | | 5000 | V | MIL-STD-883J / Method 3015.9 | 2 |
| ESD Charged device model (CDM) | | -2000 | | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 |
| ESD Machine model (MM) | | -250 | | 250 | V | JESD22-A115C | 2 |
| Package thermal resistance, SOIC-8L | θJA | | 125 | | ℃/W | | 4 |
## CAD (KiCad official)
- Symbol: `LTC6002XS8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ltc6002xs8-etched.step` / `ltc6002xs8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc6002xs8.step` / `ltc6002xs8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Linearin datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945697181192192) (20 pp, sha256 `befc1d028f16941d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc6002xs8-datasheet.pdf)