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LTC4418CUF#TRPBF
Public Made by Adomby adom
Analog Devices Power Distribution Switches, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLTC4418CUF#TRPBF
Analog Devices · Power Distribution Switches · QFN-20-EP(4x4)
LTC4418CUF#TRPBF from Analog Devices, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TMR | passive | Validation timer pin: a capacitor of at least 100pF between TMR and GND sets a validation time of 16ms/nF for both channels, connecting TMR to INTVCC gives a 3.5µs minimum (Fast Mode), and it must not be left open. |
| 2 | UV1 | input | Channel 1 undervoltage comparator input; falling voltages below 1V (VTH) invalidate the V1 supply, and unused pins must be connected to ground. |
| 3 | OV1 | input | Channel 1 overvoltage comparator input; rising voltages above 1V (VTH) invalidate the V1 supply, and unused pins must be connected to ground. |
| 4 | UV2 | input | Channel 2 undervoltage comparator input; falling voltages below 1V (VTH) invalidate the V2 supply, and unused pins must be connected to ground. |
| 5 | OV2 | input | Channel 2 overvoltage comparator input; rising voltages above 1V (VTH) invalidate the V2 supply, and unused pins must be connected to ground. |
| 6 | VALID1 | output | 40V-rated open-drain output that pulls low when V1 has been within its OV/UV window for at least the validation time, and must be left open when not used. |
| 7 | VALID2 | output | 40V-rated open-drain output that pulls low when V2 has been within its OV/UV window for at least the validation time, and must be left open when not used. |
| 8 | GND | power_in | Device ground. |
| 9 | CAS | output | Cascade output pulled up to INTVCC by a 20µA internal source, can be pulled up to as high as 5.5V independent of the input supplies, and must be left open if not used. |
| 10 | INTVCC | power_out | Internal low-voltage supply decoupling output; no external load current may be drawn from it, and a 0.1µF capacitor to GND is required. |
| 11 | G2 | output | Channel 2 P-channel MOSFET gate drive output, clamped 6.2V (ΔVG) below VS2 when driven low. |
| 12 | VS2 | input | Channel 2 common-source connection of the external P-channel MOSFETs used to monitor the gate drive reference; connect to ground when the channel is not used. |
| 13 | G1 | output | Channel 1 P-channel MOSFET gate drive output, clamped 6.2V (ΔVG) below VS1 when driven low. |
| 14 | VS1 | input | Channel 1 common-source connection of the external P-channel MOSFETs used to monitor the gate drive reference; connect to ground when the channel is not used. |
| 15 | VOUT | power_out | Output voltage supply and sense pin that powers most internal circuitry above 2.475V and blocks any input from connecting unless VOUT is at least 125mV (VREV) below that input. |
| 16 | V2 | power_in | Lower-priority input supply that connects to VOUT through its external P-channel MOSFETs only when V2 is valid and V1 is not; connect to ground when not used. |
| 17 | V1 | power_in | Higher-priority input supply that connects to VOUT through its external P-channel MOSFETs when V1 is within its user-defined OV/UV window for the validation time. |
| 18 | EN | input | 40V channel enable input; driving it below 1V (VEN(TH)) turns off both external MOSFETs, it is pulled to INTVCC by a 3.2µA source, and it must be connected to INTVCC when not used. |
| 19 | SHDN | input | 40V shutdown input; driving it below VSHDN(TH) turns off all external MOSFETs and resets the validation timers, it is pulled to INTVCC by a 3.2µA source, and it must be connected to INTVCC when not used. |
| 20 | HYS | input | OV/UV comparator hysteresis input; grounding it selects fixed internal hysteresis, while a resistor to GND sets a 63mV/RHYS hysteresis current, and it must be connected to GND if not used. |
| 21 | GND | power_in | Exposed pad is device ground and may be left open or connected to device ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-20-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply range | V1, V2, VOUT | 2.5 | 40 | V | 3 | ||
| Operating ambient temperature range (LTC4418C) | 0 | 70 | °C | LTC4418C grade (this MPN) | 2 | ||
| Supply voltages V1, V2 | V1, V2 | -42 | 60 | V | 2 | ||
| VOUT voltage | VOUT | -0.3 | 42 | V | 2 | ||
| VS1, VS2 voltage | VS1, VS2 | -0.3 | 60 | V | 2 | ||
| Voltage from V1, V2 to VOUT | -84 | 60 | V | 2 | |||
| Voltage from VS1, VS2 to G1, G2 | -0.3 | 7.5 | V | 2 | |||
| EN, SHDN input voltage | EN, SHDN | -0.3 | 60 | V | 2 | ||
| OV1, OV2, UV1, UV2, TMR voltage | OV1, OV2, UV1, UV2, TMR | -0.3 | 6 | V | 2 | ||
| HYS voltage | HYS | -0.3 | 1 | V | 2 | ||
| INTVCC voltage (absolute maximum) | INTVCC | -0.3 | 6.2 | V | 2 | ||
| VALID1, VALID2 output voltage | VALID1, VALID2 | -0.3 | 60 | V | 2 | ||
| CAS output voltage | CAS | -0.3 | 6 | V | 2 | ||
| Input currents | -3 | mA | OV1, OV2, UV1, UV2, HYS, TMR, INTVCC, EN, SHDN | 2 | |||
| Output currents | VALID1, VALID2, CAS | -2 | 5 | mA | 2 | ||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Maximum junction temperature | TJMAX | 150 | °C | 2 | |||
| INTVCC voltage | VINTVCC | 2.5 | 3.3 | 4 | V | 3 | |
| Total supply current | ITOT | 26 | 52 | µA | SHDN = 0V | 3 | |
| Total supply current (second row) | ITOT | 22 | 44 | µA | SHDN = 0V | 3 | |
| VOUT supply current | IVOUT | 17 | 34 | µA | 3 | ||
| V1, V2 supply current (diode-OR'd) | IV1, IV2 | 1.4 | 2.8 | µA | VOUT = 0V, EN = 0V | 3 | |
| V1, V2 supply current (second row) | IV1, IV2 | 21 | 42 | µA | VOUT = 0V, SHDN = 0V | 3 | |
| V1, V2 supply current (third row) | IV1, IV2 | 13 | 26 | µA | 3 | ||
| VS supply current, channel on | IVS1, IVS2 | 5.7 | 11.4 | µA | Channel ON | 3 | |
| VS supply current, channel off | IVS1, IVS2 | 1.8 | 3.6 | µA | Channel OFF | 3 | |
| Open clamp voltage (VS, VG) | ΔVG | 5.4 | 6.2 | 6.7 | V | VOUT = 11V, G1 = G2 = Open | 3 |
| Sourcing clamp voltage (VS, VG) | ΔVG(SOURCE) | 5.8 | 6.6 | 7 | V | VOUT = 11V, I = -10µA | 3 |
| Sinking clamp voltage (VS, VG) | ΔVG(SINK) | 4.5 | 5.2 | 6 | V | VOUT = 11V, I = 10µA | 3 |
| Gate pull-down current | IG(DN) | 28 | 60 | 120 | mA | VG = 3V, VS Floating | 3 |
| Gate off threshold (VS, VG) | ΔVG(OFF) | 0.2 | 0.3 | 0.4 | V | VS1 = VS2 = 2.8V, VOUT = 11V, Gate Rising | 3 |
| Gate off resistance | RG(OFF) | 8 | 16 | 28 | Ω | V1 or V2 = 12V, IG = -10mA | 3 |
| Reverse voltage threshold | VREV | 75 | 125 | 185 | mV | Measure (V1 or V2), VOUT Falling | 3 |
| Break-before-make time | tG(SWITCHOVER) | 1 | 2.7 | 4 | µs | VOUT = 11V, CGATE = 10nF (Note 4) | 3 |
| Gate turn-off delay from SHDN | tP(SHDN) | 0.3 | 0.7 | 1.4 | µs | VOUT = 11V, Falling Edge SHDN to G1 = VS1-3V or G2 = VS2, 3V, CGATE = 10nF | 3 |
| Gate turn-on/off delay from EN | tP(EN) | 0.3 | 0.7 | 1.4 | µs | VOUT = 11V, Rising/Falling EN Edge to G1 = VS1-3V or G2 = VS2, 3V, CGATE = 10nF | 3 |
| Soft-start timeout | tSS | 20 | 35 | 70 | ms | VOUT = 2V | 3 |
| VALID output low voltage | VVALID(OL) | 0.23 | 0.5 | V | I = 1mA, V1 or V2 = 2.5V, VOUT = 0V | 3 | |
| CAS output high voltage | VCAS(OH) | 1.6 | 2.7 | 3.5 | V | I = -1µA, V1, V2, VOUT > 2.5V, UV = OV = EN = 0V | 3 |
| CAS output low voltage | VCAS(OL) | 60 | 150 | mV | I = 1mA, V1 or V2 = 2.5V, VOUT = 0V | 3 | |
| CAS pull-up current | ICAS | -10 | -20 | -40 | µA | SHDN = 0V, CAS = 1V | 3 |
| CAS delay from VG(OFF) | tCAS(EN) | 0.3 | 0.7 | 1.4 | µs | VOUT = 11V | 3 |
| EN threshold voltage | VEN(TH) | 0.6 | 1 | 1.4 | V | EN Rising, VOUT = 11V | 3 |
| SHDN threshold voltage | VSHDN(TH) | 0.6 | 1 | 1.4 | V | SHDN Rising | 3 |
| SHDN, EN pull-up current | ICTRL | -1.5 | -3.2 | -5.5 | µA | SHDN = EN = 0V | 3 |
| SHDN, EN, VALID1, VALID2, CAS leakage current | ILEAK | -1 | 1 | µA | SHDN = EN = VALID1 = VALID2 = 40V, CAS = 5.5V | 3 | |
| OV/UV comparator threshold | VTH | 0.985 | 1 | 1.015 | V | VOUT = 11V, OV Rising, UV Falling | 4 |
| OV/UV comparator hysteresis | VHYS(INT) | 15 | 30 | 45 | mV | VOUT = 11V | 4 |
| OV/UV leakage current | ILEAK | -10 | 10 | nA | OV = 1.015V, UV = 0.985V | 4 | |
| External hysteresis current | IEXT | 40 | 50 | 60 | nA | IHYS = -400nA | 4 |
| External hysteresis current (second row) | IEXT | 470 | 500 | 530 | nA | IHYS = -4µA | 4 |
| HYS voltage | VHYS | 480 | 500 | 520 | mV | IHYS = -4µA | 4 |
| TMR pull-up current | ITMR | -1 | -2 | -3.5 | µA | Timer On, VTMR ≤600mV | 4 |
| TMR pull-down current | ITMR | 1 | 2 | 3.5 | µA | Timer On, VTMR ≥1.6V | 4 |
| OV, UV validation time (fast mode) | tVALID | 2 | 3.5 | 7 | µs | TMR = VINTVCC | 4 |
| OV, UV validation time (CTMR) | tVALID | 9 | 16 | 32 | ms | CTMR = 1nF | 4 |
| VALID off delay from OV/UV fault | tVALID(OFF) | 2 | 3.5 | 7 | µs | UV or OV 10% Overdrive, Measure VALID1 or VALID2 Rising Edge | 4 |
| TMR disable voltage threshold | VTH(TMROFF) | 50 | 100 | 180 | mV | Measure VINTVCC-VTMR, Rising Edge | 4 |
| Thermal resistance, junction to ambient | θJA | 47 | °C/W | 2 | |||
| Thermal resistance, junction to case | θJC | 4.5 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
LTC4418CUF#TRPBF - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ltc4418cuf-trpbf-etched.step/ltc4418cuf-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4418cuf-trpbf.step/ltc4418cuf-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (30 pp, sha256
e98468bf3fcc3e4d, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).