component
LTC4416EMS#TRPBF
Public Made by Adomby adom
Analog Devices AC-DC Controllers And Regulators, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTC4416EMS#TRPBF
Analog Devices · AC-DC Controllers And Regulators · MSOP-10
LTC4416EMS#TRPBF from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | H1 | output | Open-drain comparator output of the E1 pin: it goes high impedance when E1 is above VREF and is pulled to GND otherwise, with a maximum permitted voltage of 7V. |
| 2 | E1 | input | LTC4416 comparator enable input for the V1 path: a signal above VREF (1.18V to 1.24V) enables V1, and an internal current sink pulls E1 down when it exceeds 1.5V. |
| 3 | GND | power_in | Ground pin that provides the power return path for all internal circuits. |
| 4 | E2 | input | LTC4416 comparator enable input for the V2 path: a signal below VREF (1.18V to 1.24V) enables V2, and an internal current sink pulls E2 down when it exceeds 1.5V. |
| 5 | H2 | output | Open-drain comparator output of the E2 pin: it goes high impedance when E2 is above VREF and is pulled to GND otherwise, with a maximum permitted voltage of 7V. |
| 6 | G2 | output | Gate drive for the second external P-channel MOSFET: it regulates a 25mV forward voltage between V2 and VS when V2 is greater than VS, and pulls up to the VS voltage to turn the FET off when V2 is less than VS. |
| 7 | V2 | power_in | Second input supply (usually the backup source) that powers the second power controller and bandgap reference over the 3.6V to 36V operating range, and may be bypassed to GND with 0.1µF to 10µF. |
| 8 | VS | power_in | Power sense input that powers the internal circuitry of both controllers and the bandgap reference and serves as the sense input for both controllers, and may also be supplied from an auxiliary source that feeds the load. |
| 9 | V1 | power_in | First input supply (usually the primary source) that powers the first power controller and bandgap reference over the 3.6V to 36V operating range, and may be bypassed to GND with 0.1µF to 10µF. |
| 10 | G1 | output | Gate drive for the first external P-channel MOSFET: it regulates a 25mV forward voltage between V1 and VS when V1 is greater than VS, and pulls up to the VS voltage to turn the FET off when V1 is less than VS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Range (V1, V2 and/or VS) | VV1, VV2, VVS | 3.6 | 36 | V | V1, V2 and/or VS must be in this range for proper operation | 2 | |
| Quiescent Supply Current at Low Supply While in Forward Regulation | IQFL | 70 | uA | VV1 = 3.6V, VV2 = 3.6V; combined current at V1, V2, VS averaged with VVS = 3.560V and 3.6V | 2 | ||
| Quiescent Supply Current at High Supply While in Forward Regulation | IQFH | 130 | uA | VV1 = 36V, VV2 = 36V; combined current at V1, V2, VS averaged with VVS = 35.960V and 36V | 2 | ||
| Quiescent Supply Current at Low Supply While in Reverse Turn-Off | IQRL | 70 | uA | VV1 = 3.6V, VV2 = 3.6V; combined current at V1, V2, VS with VVS = 3.7V | 2 | ||
| Quiescent Supply Current at High Supply While in Reverse Turn-Off | IQRH | 130 | uA | VV1 = 35.9V, VV2 = 35.9V; combined current at V1, V2, VS with VVS = 36V | 2 | ||
| Quiescent Supply Current at Low Supply with E1 and E2 Active | IQCL | 30 | uA | VV1 = 3.6V, VV2 = 3.6V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 measured separately | 2 | ||
| Quiescent Supply Current at High Supply with E1 and E2 Active | IQCH | 65 | uA | VV1 = 36V, VV2 = 36V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 measured separately | 2 | ||
| V1, V2 and VS Pin Leakage Current (case 1) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 28V, VVS = 0V; measure IVS | 2 |
| V1, V2 and VS Pin Leakage Current (case 2) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 14V, VVS = -14V; measure IVS | 2 |
| V1, V2 and VS Pin Leakage Current (case 3) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 36V, VVS = 8V; measure IVS | 2 |
| PowerPath Switch Forward Regulation Voltage | VFR | 10 | 40 | mV | VV1, VV2 - VVS; 3.6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF | 2 | |
| PowerPath Switch Reverse Turn-Off Threshold Voltage | VRTO | -40 | -10 | mV | VV1, VV2 - VVS; 3.6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF | 2 | |
| PowerPath Switch Forward Fast-On Voltage Comparator Threshold | VFO | 50 | 125 | mV | VV1, VV2 - VVS; 6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF; IG1, IG2 > 500uA | 2 | |
| GATE Active Forward Regulation Source Current | IG(SRC) | -9 | -2 | uA | Note 5: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12V | 3 | |
| GATE Active Forward Regulation Sink Current | IG(SNK) | 15 | 200 | uA | Note 6: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 11.96V | 3 | |
| Sink Current During Fast-On | IG(FO) | 500 | uA | Note 7: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 11.875V | 3 | ||
| Source Current During Fast-Off | IG(OFF) | -500 | uA | Note 12: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12.05V | 3 | ||
| G1 and G2 Clamp Voltage | VG(ON) | 7.4 | 8.25 | 9.1 | V | Apply IG1 = IG2 = 2uA, VV1 = VV2 = 12V, VVS = 11.8V; measure VV1 - VG1 or VV2 - VG2 | 3 |
| G1 and G2 Off Voltage | VG(OFF) | 0.35 | 0.92 | V | Apply IG1 = IG2 = -30uA, VV1 = VV2 = 12V, VVS = 12.2V; measure VV1 - VG1 or VV2 - VG2 | 3 | |
| G1 and G2 Turn-On Time | tG(ON) | 60 | us | VGS < -6V, CG = 17nF (Note 8) | 3 | ||
| G1 and G2 Turn-Off Time | tG(OFF) | 30 | us | VGS > -1.5V, CG = 17nF (Note 9) | 3 | ||
| H1 and H2 Off Current | IH(OFF) | -1 | 1 | uA | 3.6V <= VV1, VV2 <= 36V (Note 10) | 3 | |
| H1 and H2 On Voltage | VH(ON) | 100 | mV | 3.6V <= VV1, VV2 <= 36V (Note 10) | 3 | ||
| E1 and E2 Input Threshold Voltage | VREF | 1.18 | 1.215 | 1.24 | V | 3.6V <= VV1, VV2 <= 36V, -40C to 85C | 3 |
| E1 and E2 Input Leakage Current | IE | -100 | 100 | nA | 0V <= VE1, VE2 <= 1.5V | 3 | |
| Source Current When Other Channel Enabled (LTC4416) | IG(ENOFF) | -9 | -3 | uA | Note 13: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12V | 3 | |
| Supply Voltage (V1, V2) | -14 | 40 | V | 2 | |||
| Voltage from V1 or V2 to VS | -40 | 40 | V | 2 | |||
| Input Voltage E1, E2 | -0.3 | 40 | V | 2 | |||
| Input Voltage VS | -14 | 40 | V | 2 | |||
| Output Voltage G1 | -0.3 | V | Upper limit is the higher of V1 + 0.3V or VS + 0.3V (expression, not a fixed number) | 2 | |||
| Output Voltage G2 | -0.3 | V | Upper limit is the higher of V2 + 0.3V or VS + 0.3V (expression, not a fixed number) | 2 | |||
| Output Voltage H1, H2 | -0.3 | 7 | V | 2 | |||
| Operating Ambient Temperature Range (LTC4416E) | TA | -40 | 85 | C | LTC4416E grade | 2 | |
| Operating Junction Temperature Range | TJ | -40 | 125 | C | 2 | ||
| Storage Temperature Range | TSTG | -65 | 150 | C | 2 | ||
| Lead Temperature (Soldering, 10 sec) | 300 | C | 10 seconds soldering | 2 | |||
| Maximum Junction Temperature | TJMAX | 130 | C | 2 | |||
| Junction-to-Ambient Thermal Resistance (MS package) | theta-JA | 120 | C/W | 2 |
CAD (KiCad official)
- Symbol:
LTC4416EMS#TRPBF - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ltc4416ems-trpbf-etched.step/ltc4416ems-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4416ems-trpbf.step/ltc4416ems-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
6026825c93542c53, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC4416EMS#TRPBF
**Analog Devices** · AC-DC Controllers And Regulators · MSOP-10
LTC4416EMS#TRPBF from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | H1 | output | Open-drain comparator output of the E1 pin: it goes high impedance when E1 is above VREF and is pulled to GND otherwise, with a maximum permitted voltage of 7V. |
| 2 | E1 | input | LTC4416 comparator enable input for the V1 path: a signal above VREF (1.18V to 1.24V) enables V1, and an internal current sink pulls E1 down when it exceeds 1.5V. |
| 3 | GND | power_in | Ground pin that provides the power return path for all internal circuits. |
| 4 | E2 | input | LTC4416 comparator enable input for the V2 path: a signal below VREF (1.18V to 1.24V) enables V2, and an internal current sink pulls E2 down when it exceeds 1.5V. |
| 5 | H2 | output | Open-drain comparator output of the E2 pin: it goes high impedance when E2 is above VREF and is pulled to GND otherwise, with a maximum permitted voltage of 7V. |
| 6 | G2 | output | Gate drive for the second external P-channel MOSFET: it regulates a 25mV forward voltage between V2 and VS when V2 is greater than VS, and pulls up to the VS voltage to turn the FET off when V2 is less than VS. |
| 7 | V2 | power_in | Second input supply (usually the backup source) that powers the second power controller and bandgap reference over the 3.6V to 36V operating range, and may be bypassed to GND with 0.1µF to 10µF. |
| 8 | VS | power_in | Power sense input that powers the internal circuitry of both controllers and the bandgap reference and serves as the sense input for both controllers, and may also be supplied from an auxiliary source that feeds the load. |
| 9 | V1 | power_in | First input supply (usually the primary source) that powers the first power controller and bandgap reference over the 3.6V to 36V operating range, and may be bypassed to GND with 0.1µF to 10µF. |
| 10 | G1 | output | Gate drive for the first external P-channel MOSFET: it regulates a 25mV forward voltage between V1 and VS when V1 is greater than VS, and pulls up to the VS voltage to turn the FET off when V1 is less than VS. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Range (V1, V2 and/or VS) | VV1, VV2, VVS | 3.6 | | 36 | V | V1, V2 and/or VS must be in this range for proper operation | 2 |
| Quiescent Supply Current at Low Supply While in Forward Regulation | IQFL | | | 70 | uA | VV1 = 3.6V, VV2 = 3.6V; combined current at V1, V2, VS averaged with VVS = 3.560V and 3.6V | 2 |
| Quiescent Supply Current at High Supply While in Forward Regulation | IQFH | | | 130 | uA | VV1 = 36V, VV2 = 36V; combined current at V1, V2, VS averaged with VVS = 35.960V and 36V | 2 |
| Quiescent Supply Current at Low Supply While in Reverse Turn-Off | IQRL | | | 70 | uA | VV1 = 3.6V, VV2 = 3.6V; combined current at V1, V2, VS with VVS = 3.7V | 2 |
| Quiescent Supply Current at High Supply While in Reverse Turn-Off | IQRH | | | 130 | uA | VV1 = 35.9V, VV2 = 35.9V; combined current at V1, V2, VS with VVS = 36V | 2 |
| Quiescent Supply Current at Low Supply with E1 and E2 Active | IQCL | | | 30 | uA | VV1 = 3.6V, VV2 = 3.6V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 measured separately | 2 |
| Quiescent Supply Current at High Supply with E1 and E2 Active | IQCH | | | 65 | uA | VV1 = 36V, VV2 = 36V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 measured separately | 2 |
| V1, V2 and VS Pin Leakage Current (case 1) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 28V, VVS = 0V; measure IVS | 2 |
| V1, V2 and VS Pin Leakage Current (case 2) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 14V, VVS = -14V; measure IVS | 2 |
| V1, V2 and VS Pin Leakage Current (case 3) | ILEAK | -10 | -1 | 1 | uA | VV1 = VV2 = 36V, VVS = 8V; measure IVS | 2 |
| PowerPath Switch Forward Regulation Voltage | VFR | 10 | | 40 | mV | VV1, VV2 - VVS; 3.6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF | 2 |
| PowerPath Switch Reverse Turn-Off Threshold Voltage | VRTO | -40 | | -10 | mV | VV1, VV2 - VVS; 3.6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF | 2 |
| PowerPath Switch Forward Fast-On Voltage Comparator Threshold | VFO | 50 | | 125 | mV | VV1, VV2 - VVS; 6V <= VV1, VV2 <= 36V; CG1 = CG2 = 3nF; IG1, IG2 > 500uA | 2 |
| GATE Active Forward Regulation Source Current | IG(SRC) | -9 | | -2 | uA | Note 5: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12V | 3 |
| GATE Active Forward Regulation Sink Current | IG(SNK) | 15 | | 200 | uA | Note 6: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 11.96V | 3 |
| Sink Current During Fast-On | IG(FO) | 500 | | | uA | Note 7: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 11.875V | 3 |
| Source Current During Fast-Off | IG(OFF) | | | -500 | uA | Note 12: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12.05V | 3 |
| G1 and G2 Clamp Voltage | VG(ON) | 7.4 | 8.25 | 9.1 | V | Apply IG1 = IG2 = 2uA, VV1 = VV2 = 12V, VVS = 11.8V; measure VV1 - VG1 or VV2 - VG2 | 3 |
| G1 and G2 Off Voltage | VG(OFF) | 0.35 | | 0.92 | V | Apply IG1 = IG2 = -30uA, VV1 = VV2 = 12V, VVS = 12.2V; measure VV1 - VG1 or VV2 - VG2 | 3 |
| G1 and G2 Turn-On Time | tG(ON) | | | 60 | us | VGS < -6V, CG = 17nF (Note 8) | 3 |
| G1 and G2 Turn-Off Time | tG(OFF) | | | 30 | us | VGS > -1.5V, CG = 17nF (Note 9) | 3 |
| H1 and H2 Off Current | IH(OFF) | -1 | | 1 | uA | 3.6V <= VV1, VV2 <= 36V (Note 10) | 3 |
| H1 and H2 On Voltage | VH(ON) | | | 100 | mV | 3.6V <= VV1, VV2 <= 36V (Note 10) | 3 |
| E1 and E2 Input Threshold Voltage | VREF | 1.18 | 1.215 | 1.24 | V | 3.6V <= VV1, VV2 <= 36V, -40C to 85C | 3 |
| E1 and E2 Input Leakage Current | IE | -100 | | 100 | nA | 0V <= VE1, VE2 <= 1.5V | 3 |
| Source Current When Other Channel Enabled (LTC4416) | IG(ENOFF) | -9 | | -3 | uA | Note 13: V1 and V2 held at 12V, G1 and G2 forced to 9V, VS = 12V | 3 |
| Supply Voltage (V1, V2) | | -14 | | 40 | V | | 2 |
| Voltage from V1 or V2 to VS | | -40 | | 40 | V | | 2 |
| Input Voltage E1, E2 | | -0.3 | | 40 | V | | 2 |
| Input Voltage VS | | -14 | | 40 | V | | 2 |
| Output Voltage G1 | | -0.3 | | | V | Upper limit is the higher of V1 + 0.3V or VS + 0.3V (expression, not a fixed number) | 2 |
| Output Voltage G2 | | -0.3 | | | V | Upper limit is the higher of V2 + 0.3V or VS + 0.3V (expression, not a fixed number) | 2 |
| Output Voltage H1, H2 | | -0.3 | | 7 | V | | 2 |
| Operating Ambient Temperature Range (LTC4416E) | TA | -40 | | 85 | C | LTC4416E grade | 2 |
| Operating Junction Temperature Range | TJ | -40 | | 125 | C | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | C | | 2 |
| Lead Temperature (Soldering, 10 sec) | | | | 300 | C | 10 seconds soldering | 2 |
| Maximum Junction Temperature | TJMAX | | | 130 | C | | 2 |
| Junction-to-Ambient Thermal Resistance (MS package) | theta-JA | | 120 | | C/W | | 2 |
## CAD (KiCad official)
- Symbol: `LTC4416EMS#TRPBF`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `ltc4416ems-trpbf-etched.step` / `ltc4416ems-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc4416ems-trpbf.step` / `ltc4416ems-trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886120704167936) (12 pp, sha256 `6026825c93542c53`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc4416ems-trpbf-datasheet.pdf)