component

LTC4416EMS#PBF

Public Made by Adom

by adom

Analog Devices Monitors & Reset Circuits, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsltc4416ems#pbffactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers ltc4416ems-pbf: viewers · Ray 10d ago
ltc4416ems-pbf-etched.glb Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf-etched.step ltc4416ems-pbf: factory component page (tier=mfr) · Ray 10d ago
ltc4416ems-pbf-hero.glb ltc4416ems-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
ltc4416ems-pbf-hero.overlay.json Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf.glb Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf.kicad_mod Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf.kicad_sym Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf.lbr Publish 0.1.0 · Ray 10d ago
ltc4416ems-pbf.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago

LTC4416EMS#PBF

Analog Devices · Monitors & Reset Circuits · MSOP-10

LTC4416EMS#PBF from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 H1 output Open-drain comparator output of the E1 pin that goes high impedance when E1 is above VREF and is otherwise grounded, with a maximum permitted voltage of 7V.
2 E1 input LTC4416 comparator enable input where a signal above VREF enables the V1 path and driving it low causes a soft-off of the V1 path, with an internal current sink pulling E1 down when it exceeds 1.5V.
3 GND power_in Ground pin that provides the power return path for all internal circuits.
4 E2 input LTC4416 comparator enable input where a signal below VREF enables the V2 path and driving it high causes a soft-off of the V2 path, with an internal current sink pulling E2 down when it exceeds 1.5V.
5 H2 output Open-drain comparator output of the E2 pin that goes high impedance when E2 is above VREF and is otherwise grounded, with a maximum permitted voltage of 7V.
6 G2 output Gate drive pin for the second P-channel MOSFET that maintains a 25mV forward regulation voltage between V2 and VS when V2 is greater than VS, and pulls up to the VS voltage to turn the switch off when V2 is less than VS.
7 V2 power_in Second input supply that powers the second power controller and band-gap reference and may be bypassed to ground with 0.1µF to 10µF to suppress load transients.
8 VS power_in Power sense input that supplies the internal circuitry and band-gap reference, serves as a voltage sense input to both controllers, and may also be fed from an auxiliary source that supplies the load.
9 V1 power_in First input supply that powers the first power controller and band-gap reference and may be bypassed to ground with 0.1µF to 10µF to suppress load transients.
10 G1 output Gate drive pin for the first P-channel MOSFET that maintains a 25mV forward regulation voltage between V1 and VS when V1 is greater than VS, and pulls up to the VS voltage to turn the switch off when V1 is less than VS.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Power Management ICs
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Range VV1, VV2, VVS 3.6 36 V V1, V2 and/or VS must be in this range for proper operation 2
Quiescent Supply Current at Low Supply While in Forward Regulation IQFL 70 µA VV1=VV2=3.6V; combined V1, V2, VS current averaged with VVS=3.560V and 3.6V 2
Quiescent Supply Current at High Supply While in Forward Regulation IQFH 130 µA VV1=VV2=36V; combined V1, V2, VS current averaged with VVS=35.960V and 36V 2
Quiescent Supply Current at Low Supply While in Reverse Turn-Off IQRL 70 µA VV1=VV2=3.6V; combined V1, V2, VS current with VVS=3.7V 2
Quiescent Supply Current at High Supply While in Reverse Turn-Off IQRH 130 µA VV1=VV2=35.9V; combined V1, V2, VS current with VVS=36V 2
Quiescent Supply Current at Low Supply with E1 and E2 Active IQCL 30 µA VV1=VV2=3.6V, VV1-VVS=0.9V, VE1=0V, VE2=2V, V1 and V2 measured separately 2
Quiescent Supply Current at High Supply with E1 and E2 Active IQCH 65 µA VV1=VV2=36V, VV1-VVS=0.9V, VE1=0V, VE2=2V, V1 and V2 measured separately 2
V1, V2 and VS Pin Leakage Current ILEAK -10 -1 1 µA VV1=VV2=28V, VVS=0V; measure IVS 2
PowerPath Switch Forward Regulation Voltage VFR 10 40 mV VV1, VV2, VVS; 3.6V ≤ VV1, VV2 ≤ 36V; CG1 = CG2 = 3nF 2
PowerPath Switch Reverse Turn-Off Threshold Voltage VRTO -40 -10 mV VV1, VV2, VVS; 3.6V ≤ VV1, VV2 ≤ 36V; CG1 = CG2 = 3nF 2
PowerPath Switch Forward Fast-On Voltage Comparator Threshold VFO 50 125 mV VV1, VV2, VVS; 6V ≤ VV1, VV2 ≤ 36V; CG1 = CG2 = 3nF; IG1, IG2 > 500µA 2
G1 and G2 Turn-On Time tG(ON) 60 µs VGS < -6V, CG = 17nF (Note 8) 3
G1 and G2 Turn-Off Time tG(OFF) 30 µs VGS > -1.5V, CG = 17nF (Note 9) 3
GATE Active Forward Regulation Source Current IG(SRC) -9 -2 µA Note 5 3
GATE Active Forward Regulation Sink Current IG(SNK) 15 200 µA Note 6 3
Sink Current During Fast-On IG(FO) 500 µA Note 7 3
Source Current During Fast-Off IG(OFF) -500 µA Note 12 3
G1 and G2 Clamp Voltage VG(ON) 7.4 8.25 9.1 V Apply IG1 = IG2 = 2µA, VV1 = VV2 = 12V, VVS = 11.8V; measure VV1, VG1 or VV2, VG2 3
G1 and G2 Off Voltage VG(OFF) 0.35 0.92 V Apply IG1 = IG2 = -30µA, VV1 = VV2 = 12V, VVS = 12.2V; measure VV1, VG1 or VV2, VG2 3
H1 and H2 Off Current IH(OFF) -1 1 µA 3.6V ≤ VV1, VV2 ≤ 36V (Note 10) 3
H1 and H2 On Voltage VH(ON) 100 mV 3.6V ≤ VV1, VV2 ≤ 36V (Note 10) 3
H1 and H2 Turn-On Time tH(ON) 5 µs Note 11 3
H1 and H2 Turn-Off Time tH(OFF) 10 µs Note 11 3
E1 and E2 Input Threshold Voltage VREF 1.18 1.215 1.24 V 3.6V ≤ VV1, VV2 ≤ 36V, -40°C to 85°C 3
E1 and E2 Input Leakage Current IE -100 100 nA 0V ≤ VE1, VE2 ≤ 1.5V 3
Source Current When Other Channel Enabled (LTC4416) IG(ENOFF) -9 -3 µA LTC4416 (non -1 variant); Note 13 3
Voltage from V1 or V2 to VS -40 40 V 2
Supply Voltage (V1, V2) -14 40 V 2
Input Voltage E1, E2 -0.3 40 V 2
Input Voltage VS -14 40 V 2
Output Voltage G1 -0.3 V Higher of V1 + 0.3V or VS + 0.3V (formula as printed) 2
Output Voltage G2 -0.3 V Higher of V2 + 0.3V or VS + 0.3V (formula as printed) 2
Output Voltage H1, H2 -0.3 7 V 2
Operating Ambient Temperature Range (LTC4416E) -40 85 °C LTC4416E grade; guaranteed 0°C to 85°C (Note 2) 2
Operating Junction Temperature Range -40 125 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering) 300 °C 10 sec 2
Maximum Junction Temperature TJMAX 130 °C Package section; conflicts with 125°C operating junction limit 2
Junction-to-Ambient Thermal Resistance (MS 10-lead MSOP) θJA 120 °C/W MS package 2

CAD (KiCad official)

  • Symbol: LTC4416EMS#PBF
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ltc4416ems-pbf-etched.step / ltc4416ems-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4416ems-pbf.step / ltc4416ems-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 6026825c93542c53, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF