main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers ltc4415idhc-pbf: viewers · Ray 10d ago
ltc4415idhc-pbf-etched.glb Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf-etched.step ltc4415idhc-pbf: factory component page (tier=mfr) · Ray 10d ago
ltc4415idhc-pbf-hero.glb ltc4415idhc-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
ltc4415idhc-pbf-hero.overlay.json Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf.glb Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf.kicad_mod Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf.kicad_sym Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf.lbr Publish 0.1.0 · Ray 10d ago
ltc4415idhc-pbf.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 17 pins · Ray 10d ago

LTC4415IDHC#PBF

Analog Devices · Pre-ordered Chips · DFN-16-EP(3x5)

LTC4415IDHC#PBF from Analog Devices, in a DFN-16-EP(3x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 power_in Diode 1 anode and positive supply for the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 1 and 2 are fused together, and they can be grounded when not used.
2 IN1 power_in Diode 1 anode and positive supply for the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 1 and 2 are fused together, and they can be grounded when not used.
3 EN1 input Enable input for Diode 1; a high signal greater than VENTH (800mV typical) enables Diode 1.
4 CLIM1 bidirectional Current limit adjust and monitor pin for Diode 1; connect a resistor to ground (RCLIM range 125Ω to 1000Ω), shorting it to ground gives a fixed 6A limit, it must not be left open, and stray capacitance should generally be less than 200pF.
5 CLIM2 bidirectional Current limit adjust and monitor pin for Diode 2; connect a resistor to ground (RCLIM range 125Ω to 1000Ω), shorting it to ground gives a fixed 6A limit, it must not be left open, and stray capacitance should generally be less than 200pF.
6 EN2 input Enable input for Diode 2; a low signal less than VENTH (800mV typical) enables Diode 2.
7 IN2 power_in Diode 2 anode and positive supply for the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 7 and 8 are fused together, and they can be grounded when not used.
8 IN2 power_in Diode 2 anode and positive supply for the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 7 and 8 are fused together, and they can be grounded when not used.
9 OUT2 power_out Diode 2 cathode and output of the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 9 and 10 are fused together, and they should be left open when not used.
10 OUT2 power_out Diode 2 cathode and output of the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 9 and 10 are fused together, and they should be left open when not used.
11 STAT2 output Open-drain status output that pulls down during Diode 2 forward conduction; it can be left open or grounded when not used.
12 WARN2 output Open-drain overcurrent and thermal warning output that pulls down when Diode 2 current exceeds its current limit or die temperature is close to thermal shutdown.
13 WARN1 output Open-drain overcurrent and thermal warning output that pulls down when Diode 1 current exceeds its current limit or die temperature is close to thermal shutdown.
14 STAT1 output Open-drain status output that pulls down during Diode 1 forward conduction; it can be left open or grounded when not used.
15 OUT1 power_out Diode 1 cathode and output of the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 15 and 16 are fused together, and they should be left open when not used.
16 OUT1 power_out Diode 1 cathode and output of the LTC4415; bypass with a ceramic capacitor of at least 4.7µF, pins 15 and 16 are fused together, and they should be left open when not used.
17 GND power_in Exposed pad is device ground and must be soldered to PCB ground for both electrical connection to ground and good thermal conductivity.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-16-EP(3x5)
Category Interface ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Range VIN1, VOUT1, VIN2, VOUT2 1.7 5.5 V At Least One Input/Output Must Be in This Range 3
Undervoltage Lockout (VINx Rising) VUVLO 1.63 1.7 V VINx Rising 3
Quiescent Current In Forward Regulation IQF 44 80 µA VIN1 = VEN1 = VEN2 = 3.6V, IOUT1 = -1mA, VIN2 = VOUT2 = 0V, Measured Through GND Pin 3
Quiescent Current In Shutdown IQOFF 13 28 µA VIN1 = VIN2 = VEN2 = 3.6V, VEN1 = 0V, VOUT1 = VOUT2 = 0V, Measured Through GND Pin 3
Reverse Turn-Off Current: OUT1 IQR(OUT) 18 40 µA VIN1 = 3.6V, VOUT1 = 3.7V, VIN2 = 3.5V, VOUT2 = 3.6V (VOUT1 > VOUT2) 3
Reverse Turn-Off Current: OUT2 IQR(OUT) 5 11 µA VIN1 = 3.6V, VOUT1 = 3.7V, VIN2 = 3.5V, VOUT2 = 3.6V (VOUT1 > VOUT2) 3
INx Pin Current In Reverse Turn-Off IQR(IN) 4 10 µA VOUT1 = VOUT2 = 5.5V 3
INx Pin Leakage Current ILEAK(IN) -1 1 µA VIN1 = VIN2 = 0V, VOUT1 = VOUT2 = 5.5V 3
Forward Regulation Voltage (VINx, VOUTx) VFR 5 15 25 mV IOUTx = -1mA 3
Reverse Turn-Off Voltage (VINx, VOUTx) VRTO -50 -30 -10 mV 3
Forward Dynamic Resistance in Regulation RFR 18 30 mΩ IOUTx = -100mA to -300mA 3
On-Resistance in Constant Resistance Mode RON 50 70 mΩ IOUTx = -1A 3
PowerPath Turn-On Time, Diode 1 Before Enable tON 10 µs Before Enable VOUT1 = 1.5V, Diode 1 3
PowerPath Turn-On Time, Diode 2 Before Enable tON 23 µs Before Enable VOUT2 = 1.5V, Diode 2 3
PowerPath Turn-On Time, Before Enable VOUTx = 0V tON 250 µs Before Enable VOUTx = 0V 3
PowerPath Turn-On from Shutdown, VOUTx = 1.5V tON(SD) 70 µs Both Diodes Disabled and VOUTx = 1.5V Before Enable 3
PowerPath Turn-On from Shutdown, VOUTx = 0V tON(SD) 320 µs Both Diodes Disabled and VOUTx = 0V Before Enable 3
PowerPath Switchover Time tSWITCH 9 µs VINx ↑ (2.6V to 4.6V) to VOUTx Starts Rising, Both Diodes Enabled, OUT1 and OUT2 Tied Together 3
PowerPath Turn-Off Time tOFF 2 µs Disable to IIN Falling from 100mA to 1mA 3
Soft-Start Duration tSS 2 ms VOUTx = 0V 3
Current Monitor Ratio at IOUT = -4A ICLIMx/IOUTx 0.9 1 1.1 mA/A When IOUTx = -4A 3
Current Monitor Ratio at IOUT = -2A ICLIMx/IOUTx 0.8 1 1.2 mA/A When IOUTx = -2A 3
CLIM Clamp Voltage In Current Limit VCLIM 0.5 V In Current Limit 3
Current Limit Adjustability ILIM(ADJ) 0.5 4 A 3
Accuracy of Adjustable Current Limit Threshold, 4A ILIM -8 8 % VOUTx = VINx, 0.5V, Current Limit = 4A 3
Accuracy of Adjustable Current Limit Threshold, 2A ILIM -15 15 % VOUTx = VINx, 0.5V, Current Limit = 2A 3
Internal Current Limit ILIM(INT) 4 6 9 A RCLIMx = 0Ω, VOUTx = 0V 3
Thermal Warning Threshold, Rising Temperature TWARN 130 °C 3
Thermal Warning Hysteresis TWARN 15 °C 3
Thermal Shutdown Threshold, Rising Temperature TSD 160 °C 3
Thermal Shutdown Hysteresis TSD 20 °C 3
Open-Drain Output Low Voltage VOL 0.05 0.4 V Current Into Open-Drain Output = 3mA 3
Open-Drain Output High Leakage Current 0 1 µA Open-Drain Output Voltage = 5.5V 3
STAT Turn-On Time, EN1 Rising to STAT1 Pull-Down tSTAT(ON) 5 µs EN1 Rising to STAT1 Pull-Down 3
STAT Turn-On Time, EN2 Falling to STAT2 Pull-Down tSTAT(ON) 18 µs EN2 Falling to STAT2 Pull-Down 3
STAT Turn-Off Time tSTAT(OFF) 2 µs Disable to STAT Pull-Up 4
WARN Turn-On Time tWARN(ON) 500 µs Current Limit to WARN Pull-Down 4
WARN Turn-Off Time tWARN(OFF) 5 µs Out of Current Limit to WARN Pull-Up 4
EN1 Rising and EN2 Falling Thresholds VENTH 760 800 840 mV 4
EN1 and EN2 Hysteresis VENHYST 55 mV 4
Enable Pin Current When Pulled High IEN 0 1 µA VEN1 = VEN2 = 3.6V 4
Input/Output Voltage (IN1, IN2, OUT1, OUT2, CLIM1, CLIM2, STAT1, STAT2, WARN1, WARN2) -0.3 6 V 2
Operating Junction Temperature Range TJ -40 125 °C LTC4415I, Notes 3, 4 2
Storage Temperature Range TSTG -65 150 °C 2
Thermal Resistance, Junction-to-Ambient (DHC 16-lead DFN) θJA 43 °C/W Correctly soldered to 2500mm² double-sided 1oz copper board 2

CAD (KiCad official)

  • Symbol: LTC4415IDHC#PBF
  • Footprint: Package_DFN_QFN:DFN-16-1EP_3x5mm_P0.5mm_EP1.66x4.4mm
  • 3D model: DFN-16-EP(3x5) (KiCad packages3D, STEP)
  • 3D model files: ltc4415idhc-pbf-etched.step / ltc4415idhc-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4415idhc-pbf.step / ltc4415idhc-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 e35970b1d556a4ba, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF