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LTC4412ES6#TRMPBF

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Analog Devices Gate Drivers, TSOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC4412ES6#TRMPBF

Analog Devices · Gate Drivers · TSOT-23-6L

LTC4412ES6#TRMPBF from Analog Devices, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Primary input supply voltage that powers the internal circuitry and is one of two voltage sense inputs, and it can be bypassed to ground with 0.1µF to 10µF to suppress load transients.
2 GND power_in Ground pin that provides the power return for all internal circuits.
3 CTL input Digital control input where a logic high (VIH) forces the primary MOSFET gate-to-source voltage to a small value (VGOFF) and forces STAT to sink 10µA, with a 3.5µA internal pull-down holding it low when open and a 0.35V VIL threshold.
4 STAT output Open-drain status output that is open in forward regulation and sinks 10µA (IS(SNK)) in reverse turn-off or when CTL is high, and it can be biased from ground to 28V regardless of the supply voltage.
5 GATE output Gate drive output for the primary P-channel MOSFET that regulates a 20mV forward voltage between VIN and SENSE and is clamped about 7V (VG(ON)) below the higher of VIN or SENSE.
6 SENSE power_in Power sense input that supplies power to internal circuitry and is the second voltage sense input, usually fed from an auxiliary source such as an AC adapter or back-up battery.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSOT-23-6L
Category Motor Driver ICs
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Range (VIN and/or VSENSE must be in this range for proper operation) VIN, VSENSE 2.5 28 V VIN and/or VSENSE must be in this range for proper operation 3
Quiescent Supply Current at Low Supply While in Forward Regulation IQFL 11 19 µA VIN = 3.6V. Measure combined current at VIN and SENSE pins averaged with VSENSE = 3.5V and VSENSE = 3.6V (Note 3) 3
Quiescent Supply Current at High Supply While in Forward Regulation IQFH 15 26 µA VIN = 28V. Measure combined current at VIN and SENSE pins averaged with VSENSE = 27.9V and VSENSE = 28V (Note 3) 3
Quiescent Supply Current at Low Supply While in Reverse Turn-Off IQRL 10 19 µA VIN = 3.6V, VSENSE = 3.7V. Measure combined current of VIN and SENSE pins 3
Quiescent Supply Current at High Supply While in Reverse Turn-Off IQRH 16 28 µA VIN = 27.9V, VSENSE = 28V. Measure combined current of VIN and SENSE pins 3
Quiescent Supply Current at Low Supply with CTL Active IQCL 7 13 µA VIN = 3.6V, VSENSE = 0V, VCTL = 1V 3
Quiescent Supply Current at High Supply with CTL Active IQCH 12 20 µA VIN = 28V, VSENSE = 0V, VCTL = 1V 3
VIN and SENSE Pin Leakage Currents When Other Pin Supplies Power ILEAK -3 0 1 µA VIN = 28V, VSENSE = 0V; VSENSE = 28V, VIN = 0V; VIN = 14V, VSENSE = -14V; VSENSE = 14V, VIN = -14V 3
PowerPath Switch Forward Regulation Voltage VFR 10 20 32 mV VIN, VSENSE, 2.5V ≤ VIN ≤ 28V 3
PowerPath Switch Reverse Turn-Off Threshold Voltage VRTO 10 20 32 mV VSENSE, VIN, 2.5V ≤ VIN ≤ 28V 3
GATE Active Forward Regulation Source Current IG(SRC) -1 -2.5 -5 µA (Note 4) 3
GATE Active Forward Regulation Sink Current IG(SNK) 25 50 85 µA (Note 4) 3
GATE Clamp Voltage VG(ON) 6.3 7 7.7 V Apply IGATE = 1µA, VIN = 12V, VSENSE = 11.9V, measure VIN, VGATE 3
GATE Off Voltage VG(OFF) 0.13 0.25 V Apply IGATE = -5µA, VIN = 12V, VSENSE = 12.1V, measure VSENSE, VGATE 3
GATE Turn-On Time tG(ON) 110 175 µs VGS < -3V, CGATE = 1nF (Note 5) 3
GATE Turn-Off Time tG(OFF) 13 22 µs VGS > -1.5V, CGATE = 1nF (Note 6) 3
STAT Off Current IS(OFF) -1 0 1 µA 2.5V ≤ VIN ≤ 28V (Note 7) 3
STAT Sink Current IS(SNK) 6 10 17 µA 2.5V ≤ VIN ≤ 28V (Note 7) 3
STAT Turn-On Time tS(ON) 4.5 25 µs (Note 8) 3
STAT Turn-Off Time tS(OFF) 40 75 µs (Note 8) 3
CTL Input Low Voltage VIL 0.35 V 2.5V ≤ VIN ≤ 28V 3
CTL Input High Voltage VIH 0.635 V 2.5V ≤ VIN ≤ 28V 3
CTL Input Pull-Down Current ICTL 1 3.5 5.5 µA 0.35V ≤ VCTL ≤ 28V 3
Supply Voltage (VIN) VIN -14 36 V 2
Voltage from VIN to SENSE VIN-VSENSE -28 28 V 2
Input Voltage CTL VCTL -0.3 36 V 2
Input Voltage SENSE VSENSE -14 36 V 2
Output Voltage GATE VGATE -0.3 V Max is the higher of VIN + 0.3V or SENSE + 0.3V 2
Output Voltage STAT VSTAT -0.3 36 V 2
Operating Junction Temperature Range TJ -55 150 °C Note 2 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering) TLEAD 300 °C 10 sec (Note 1) 2
Operating Junction Temperature Range for LTC4412ES6 (order table) TJ -40 85 °C LTC4412ES6 temperature range per Order Information 2
Thermal Resistance Junction-to-Ambient (TSOT-23) θJA 230 °C/W S6 package, 6-lead TSOT-23 2

CAD (KiCad official)

  • Symbol: LTC4412ES6#TRMPBF
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: ltc4412es6-trmpbf-etched.step / ltc4412es6-trmpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4412es6-trmpbf.step / ltc4412es6-trmpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (14 pp, sha256 9e5d0918afdb4613, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF