component
LTC4411ES5#TRPBF
Public Made by Adomby adom
Analog Devices Power Distribution Switches, TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LTC4411ES5#TRPBF
Analog Devices · Power Distribution Switches · TSOT-23-5
LTC4411ES5#TRPBF from Analog Devices, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Ideal diode anode and positive power supply for the LTC4411, operating over 2.6V to 5.5V; when used as a switch it must be bypassed with a low ESR ceramic capacitor of 1µF (X5R or X7R preferred). |
| 2 | GND | power_in | Power and signal ground for the IC; all voltages are referenced to GND. |
| 3 | CTL | input | Controlled shutdown pin with a weak 3µA pull-down: pull high to shut down the IC, tie to GND to enable it, and it can be left floating when not in use. |
| 4 | STAT | output | Open-drain status indicator that is Hi-Z in forward conduction and pulls down 10µA in reverse turn-off; terminate through a 470k resistor to a high voltage to read conduction, and it may be left floating or grounded when not in use. |
| 5 | OUT | power_out | Ideal diode cathode and output of the LTC4411, to be bypassed with a nominal 1mΩ ESR capacitor of at least 4.7µF; the part is stable with ESRs down to 0.2mΩ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Range | VIN, VOUT | 2.6 | 5.5 | V | 2 | ||
| Operating Ambient Temperature Range | -40 | 85 | °C | 2 | |||
| Operating Junction Temperature | -40 | 125 | °C | 2 | |||
| IN, OUT, STAT, CTL Voltage | -0.3 | 6 | V | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature (Soldering) | 300 | °C | 10 sec soldering | 2 | |||
| Continuous Power Dissipation | 500 | mW | Derate 10mW/°C above 70°C | 2 | |||
| VIN Current When VOUT Supplies Power | ILEAK | -1 | 1 | µA | VIN = 0V, VOUT = 5.5V | 2 | |
| STAT Pin Off Current | IS(OFF) | -1 | 1 | µA | VIN = 3.6V, VOUT < VIN, VFWD, VCTL < VTH, VHYST | 2 | |
| Forward Turn-On Voltage (VIN, VOUT) | VFWD | 8 | 17 | 28 | mV | VIN = 3.6V | 2 |
| Reverse Turn-Off Voltage (VOUT, VIN) | -VRTO | -4 | 5 | 14 | mV | VIN = 3.6V | 2 |
| CTL Input Threshold Voltage | VTH | 390 | 460 | 530 | mV | VTH = (VIL + VIH)/2 | 2 |
| CTL Input Pull-Down Current | ICTL | 2 | 3.5 | 6 | µA | VOUT < VIN = 3.6V, VCTL = 1.5V | 2 |
| STAT Pin Sink Current | IS(SNK) | 7 | 11 | 18 | µA | VIN = 3.6V, VOUT > VIN + VRTO, VCTL > VTH + VHYST | 2 |
| Quiescent Current While in Reverse Turn-Off. Current Drawn from VIN | IQRIN | 1.3 | 1.8 | 2.3 | µA | VIN = 3.6V, VOUT = 3.7V | 2 |
| Quiescent Current While in Reverse Turn-Off. Current Drawn from VOUT | IQROUT | 14 | 17 | 23 | µA | VIN = 3.6V, VOUT = 3.7V | 2 |
| Junction-to-Ambient Thermal Resistance (2-layer board) | θJA | 250 | °C/W | TJMAX = 125°C, θJA as printed (Note 3) | 2 | ||
| Junction-to-Ambient Thermal Resistance, 2500mm2 topside copper | θJA | 125 | °C/W | Topside 2500mm2, backside 2500mm2, board area 2500mm2; 2-layer 1oz copper, 3/32in FR-4 | 3 | ||
| Junction-to-Ambient Thermal Resistance, 1000mm2 topside copper | θJA | 125 | °C/W | Topside 1000mm2, backside 2500mm2, board area 2500mm2; 2-layer 1oz copper, 3/32in FR-4 | 3 | ||
| Junction-to-Ambient Thermal Resistance, 225mm2 topside copper | θJA | 130 | °C/W | Topside 225mm2, backside 2500mm2, board area 2500mm2; 2-layer 1oz copper, 3/32in FR-4 | 3 | ||
| Junction-to-Ambient Thermal Resistance, 100mm2 topside copper | θJA | 135 | °C/W | Topside 100mm2, backside 2500mm2, board area 2500mm2; 2-layer 1oz copper, 3/32in FR-4 | 3 | ||
| Junction-to-Ambient Thermal Resistance, 50mm2 topside copper | θJA | 150 | °C/W | Topside 50mm2, backside 2500mm2, board area 2500mm2; 2-layer 1oz copper, 3/32in FR-4 | 3 |
CAD (KiCad official)
- Symbol:
LTC4411ES5#TRPBF - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ltc4411es5-trpbf-etched.step/ltc4411es5-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4411es5-trpbf.step/ltc4411es5-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (8 pp, sha256
edd261621c95dc50, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).