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LTC4376HDHD#TRPBF

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Analog Devices Pre-ordered Chips, DFN-16-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC4376HDHD#TRPBF

Analog Devices · Pre-ordered Chips · DFN-16-EP(4x5)

LTC4376HDHD#TRPBF from Analog Devices, in a DFN-16-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
2 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
3 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
4 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
5 SHDN input SHDN is the shutdown control input: pulling it below 0.6V shuts the part down and pulling it above 2V turns it on, and it can be pulled up to 40V without damage.
6 NC unconnected NC is a no connection pin that is not internally connected.
7 INK power_in INK is the voltage sense and supply voltage pin, which must be connected to IN and has an operating supply range of 4V to 40V.
8 CS passive CS is the gate drive return, through which the fast pull-down current flows during a reverse current event, and it can be connected to IN or left open.
9 GATE output GATE is the gate drive output that pulls high to enhance the N-channel MOSFET when load current creates more than 30mV of drop, and turns the MOSFET off within 300ns on reverse current.
10 OUTK input OUTK is the drain voltage sense pin, which must be connected to OUT to control the MOSFET voltage drop.
11 VSS power_in VSS is the device ground, and all voltages are referenced to VSS unless otherwise specified.
12 NC unconnected NC is a no connection pin that is not internally connected.
13 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
14 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
15 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
16 IN power_in IN is the source of the internal N-channel MOSFET and the anode of the ideal diode, and the IN pins are protected against reverse inputs of up to -40V.
17 OUT power_out The exposed pad is the drain of the internal N-channel MOSFET and the cathode of the ideal diode, and must be soldered for a low resistance contact.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-16-EP(4x5)
Category Interface ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Range VINK 4 40 V Full operating temperature range 3
Gate Drive (VGATE, VCS) ∆VGATE 4.5 5.5 V INK = 4V, IGATE = 0, -1µA 3
Gate Drive (VGATE, VCS) ∆VGATE 10 12 V INK = 8V to 40V, IGATE = 0, -1µA 3
OUT Reverse Leakage Current IOUT 150 µA IN = GATE = 0V, OUT = 40V 3
Source-Drain Regulation Voltage (VINK, VOUTK) ∆VSD(REG) 20 30 45 mV 1mA < IIN < 100mA 3
Body Diode Forward Voltage Drop (VIN, VOUT) ∆VSD(FWD) 0.55 0.77 1 V IIN = 7A, MOSFET Off 3
Internal N-Channel MOSFET On Resistance RDS(ON) 15 30 mΩ IIN = 7A 3
Gate Pull-Up Current IGATE(UP) -6 -10 -17 µA GATE = INK, ∆VSD = 0.1V 3
Gate Pull-Down Current IGATE(DOWN) 70 130 180 mA Fault Condition, ∆VGATE = 5V, ∆VSD = -1V 3
Gate Turn-Off Delay Time tOFF 0.3 0.5 µs ∆VSD = 0.1V to -1V, ∆VGATE < 2V 3
SHDN Pin Input Threshold VSHDN(TH) 0.6 1.2 2 V INK = 4V to 40V 3
SHDN Pin Float Voltage VSHDN(FLT) 0.6 1.75 2.5 V INK = 4V to 40V 3
SHDN Leakage Current ILEAK 1 µA SHDN = 2.6V 3
Reverse CS Threshold for GATE Off VCS(TH) -2.7 -1.8 -0.9 V GATE = 0V, IGATE(DOWN) = 1mA 3
IN, INK, CS, SHDN voltage -40 80 V 2
OUT, OUTK voltage -0.3 80 V 2
INK-OUTK voltage -45 100 V 2
INK-CS voltage -1 80 V 2
IN-OUT voltage -45 0.3 V Note 3 2
GATE voltage -0.3 10 V Relative to VCS (VCS, 0.3V to VCS + 10V) 2
Operating Junction Temperature Range (LTC4376H) TJ -40 125 °C LTC4376H 2
Storage Temperature Range TSTG -65 150 °C 2
Maximum Junction Temperature TJMAX 150 °C 2
Junction-to-Ambient Thermal Resistance θJA 43 °C/W DHD package 2
Junction-to-Case Thermal Resistance θJC 4.3 °C/W DHD package 2

CAD (KiCad official)

  • Symbol: LTC4376HDHD#TRPBF
  • Footprint: Package_DFN_QFN:DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm
  • 3D model: DFN-16-EP(4x5) (KiCad packages3D, STEP)
  • 3D model files: ltc4376hdhd-trpbf-etched.step / ltc4376hdhd-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4376hdhd-trpbf.step / ltc4376hdhd-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 c9f4f4eb0fe9eba1, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF