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LTC4376HDHD#PBF

Public Made by Adom

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Analog Devices Pre-ordered Chips, DFN-16-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsltc4376hdhd#pbffactory-2.0.0extractor-text

Verified LTC4376HDHD#PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 17 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LTC4376HDHD#PBF · DFN-16-EP(4x5) · 17 pins
  • ✓copper: 17 copper pads, none touching another net
  • ✓datasheet: all 17 pin names found in the 18-page datasheet
  • ✓distributor: lcsc C688421, digikey 505-LTC4376HDHD#PBF-ND, mouser 584-LTC4376HDHD#PBF
  • ✓family: DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-apwptkyv/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 17 pins = 17 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 17 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ltc4376hdhd-pbf.kicad_sym✓ ltc4376hdhd-pbf.kicad_mod✓ ltc4376hdhd-pbf.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers ltc4376hdhd-pbf: viewers · Ray 10d ago
ltc4376hdhd-pbf-etched.glb Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf-etched.step ltc4376hdhd-pbf: factory component page (tier=mfr) · Ray 10d ago
ltc4376hdhd-pbf-hero.glb ltc4376hdhd-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
ltc4376hdhd-pbf-hero.overlay.json Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf.glb Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf.kicad_mod Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf.kicad_sym Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf.lbr Publish 0.1.0 · Ray 10d ago
ltc4376hdhd-pbf.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 17 pins · Ray 10d ago

LTC4376HDHD#PBF

Analog Devices · Pre-ordered Chips · DFN-16-EP(4x5)

LTC4376HDHD#PBF from Analog Devices, in a DFN-16-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
2 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
3 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
4 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
5 SHDN input Shutdown control input that enters low current mode when pulled below 0.6V and turns the part on above 2V, tolerating up to 40V or 40V below VSS; connect to IN if unused.
6 NC unconnected No connection, not internally connected.
7 INK power_in Voltage sense and supply input (4V to 40V operating range) used to control the MOSFET voltage drop, connected to IN.
8 CS passive Gate drive return through which the fast pull-down current flows during a reverse current event; connect to IN or leave open.
9 GATE output Gate drive output that enhances the MOSFET above 30mV of drop and pulls down to CS within 300ns on reverse current; connect to the external MOSFET gate in a back-to-back configuration, otherwise leave open.
10 OUTK input Drain voltage sense input used to control the MOSFET voltage drop, connected to OUT.
11 VSS power_in Device ground.
12 NC unconnected No connection, not internally connected.
13 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
14 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
15 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
16 IN passive Source of the internal N-channel MOSFET and anode of the ideal diode, protected against reverse inputs down to -40V.
17 OUT passive Exposed pad that is the drain of the internal N-channel MOSFET and the cathode of the ideal diode, serving as the common output when multiple LTC4376s are diode-ORed.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-16-EP(4x5)
Category Interface ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Supply Range VINK 4 40 V 3
Source-Drain Regulation Voltage (VINK - VOUTK) ∆VSD(REG) 20 30 45 mV 1mA < IIN < 100mA 3
Body Diode Forward Voltage Drop (VIN - VOUT) ∆VSD(FWD) 0.55 0.77 1 V IIN = 7A, MOSFET Off 3
Internal N-Channel MOSFET On Resistance RDS(ON) 15 30 mΩ IIN = 7A 3
Peak Avalanche Current IAS 40 A L = 0.1mH (Note 5) 3
Gate Pull-Up Current IGATE(UP) -6 -10 -17 µA GATE = INK, ∆VSD = 0.1V 3
Gate Pull-Down Current IGATE(DOWN) 70 130 180 mA Fault Condition, ∆VGATE = 5V, ∆VSD = -1V 3
Gate Turn-Off Delay Time tOFF 0.3 0.5 µs ∆VSD = 0.1V to -1V, ∆VGATE < 2V 3
SHDN Pin Input Threshold VSHDN(TH) 0.6 1.2 2 V INK = 4V to 40V 3
SHDN Pin Float Voltage VSHDN(FLT) 0.6 1.75 2.5 V INK = 4V to 40V 3
Reverse CS Threshold for GATE Off VCS(TH) -0.9 -1.8 -2.7 V GATE = 0V, IGATE(DOWN) = 1mA 3
SHDN Leakage Current ILEAK 1 µA SHDN = 2.6V 3
OUT Reverse Leakage Current IOUT 150 µA IN = GATE = 0V, OUT = 40V 3
IN, INK, CS, SHDN voltage -40 80 V 2
OUT, OUTK voltage -0.3 80 V 2
INK-OUTK voltage -45 100 V 2
INK-CS voltage -1 80 V 2
IN-OUT voltage -45 0.3 V Note 3 2
Operating Junction Temperature Range -40 125 °C LTC4376H 2
Storage Temperature Range -65 150 °C 2
Maximum Junction Temperature TJMAX 150 °C 2
Junction-to-Ambient Thermal Resistance θJA 43 °C/W 2
Junction-to-Case Thermal Resistance θJC 4.3 °C/W 2

CAD (KiCad official)

  • Symbol: LTC4376HDHD#PBF
  • Footprint: Package_DFN_QFN:DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm
  • 3D model: DFN-16-EP(4x5) (KiCad packages3D, STEP)
  • 3D model files: ltc4376hdhd-pbf-etched.step / ltc4376hdhd-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4376hdhd-pbf.step / ltc4376hdhd-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 c9f4f4eb0fe9eba1, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF