component
LTC4332IUFD#PBF
Public Made by Adomby adom
Analog Devices Signal Buffers, Repeaters, Splitters, QFN-20-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTC4332IUFD#PBF
Analog Devices · Signal Buffers, Repeaters, Splitters · QFN-20-EP(4x5)
LTC4332IUFD#PBF from Analog Devices, in a QFN-20-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Main supply voltage, 3.0V ≤ VCC ≤ 5.5V; bypass with 4.7µF ceramic capacitor to GND. |
| 2 | VL | power_in | Logic interface supply voltage, 1.62V ≤ VL ≤ 5.5V; bypass with 1µF ceramic capacitor to GND. |
| 3 | ON | input | Enable input; set high for operation, set low for low-power mode where the internal reset is held and outputs are disabled; connect to VL if unused. |
| 4 | REMOTE | input | Operating mode select; set low for local SPI slave mode and high for SPI master mode on the remote side; weakly pulled to GND. |
| 5 | LINK | output | Open-drain link status output driven low when link communication is established; requires external pull-up to VL if monitored, otherwise float or connect to GND. |
| 6 | SSC | input | Active-low control interface slave select that must be set high when the SPI bus is idle; used only in local mode, weakly pulled to VL and may be left unconnected, and left unconnected in remote mode. |
| 7 | SCK | bidirectional | Serial port clock: an input in local mode (MOSI captured on rising edge, MISO updated on falling edge) and an output providing the clock to remote devices in remote mode. |
| 8 | MOSI | bidirectional | Master Out Slave In: serial data input for the slave selects in local mode (captured on SCK rising edge) and serial data output in remote mode; contains a weak bus-hold. |
| 9 | MISO | bidirectional | Master In Slave Out: serial data output for the slave selects in local mode (driver disabled when SS1-3 and SSC are high) and serial data input in remote mode, weakly pulled to VL; contains a weak bus-hold. |
| 10 | INT | bidirectional | Remote-to-local interrupt: open-drain output in local mode and input in remote mode, also the level-sensitive active-low interrupt for the control interface; connect pull-up to VL on the local side and do not allow to float on the remote side. |
| 11 | SS1 | bidirectional | Remote slave select 1 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 12 | SS2 | bidirectional | Remote slave select 2 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 13 | SS3 | bidirectional | Remote slave select 3 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 14 | SPEED1 | input | 3-state input which, together with SPEED2, selects link baud rate and remote SCK timing parameters; set high, low, or float as defined in Table 2. |
| 15 | SPEED2 | input | 3-state input which, together with SPEED1, selects link baud rate and remote SCK timing parameters; set high, low, or float as defined in Table 2. |
| 16 | GND | power_in | Ground; connect to GND. |
| 17 | Y | output | Non-inverting link driver output; connect to the A pin of a second LTC4332 set to the opposite mode. |
| 18 | Z | output | Inverting link driver output; connect to the B pin of a second LTC4332 set to the opposite mode. |
| 19 | B | input | Inverting link receiver input; connect to the Z pin of the second LTC4332 set to the opposite mode. |
| 20 | A | input | Non-inverting link receiver input; connect to the Y pin of the second LTC4332 set to the opposite mode. |
| 21 | GND | power_in | Exposed pad on the package bottom is GND and must be soldered to the PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-20-EP(4x5) |
| Category | Interface ICs |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Range (VCC) | VCC | 3 | 5.5 | V | 2 | ||
| Logic Interface Supply Range (VL) | VL | 1.62 | 5.5 | V | 2 | ||
| Operating Temperature Range, LTC4332I grade | TA | -40 | 85 | °C | LTC4332I | 2 | |
| Supply Voltage VCC absolute maximum | VCC | -0.3 | 6 | V | 2 | ||
| Supply Voltage VL absolute maximum | VL | -0.3 | 6 | V | 2 | ||
| Logic Signals ON, LINK, INT, SSC absolute maximum | -0.3 | 6 | V | 2 | |||
| Interface I/O A, B, Y, Z absolute maximum | -60 | 60 | V | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 2 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 43 | °C/W | 2 | |||
| Thermal Resistance Junction-to-Case | θJC | 3.4 | °C/W | 2 | |||
| Operating Supply Current, Low Power | ICC | 1 | 40 | µA | Low Power: ON = 0 | 2 | |
| Operating Supply Current, Idle | ICC | 12 | mA | Idle: ON = 1, Idle SPI | 2 | ||
| Operating Supply Current, Active | ICC | 120 | mA | Active: SCK = 2MHz, SPEED INDEX = 8 (Note 7) | 2 | ||
| Logic Supply Current | IL | -140 | 140 | µA | 2 | ||
| Differential Driver Output Voltage, no load | /VOD/ | 1.5 | V | R = ∞ | 2 | ||
| Differential Driver Output Voltage, R = 27Ω | /VOD/ | 1.5 | 5 | V | R = 27Ω (Figure 1) | 2 | |
| Maximum Driver Short-Circuit Current | IOSD | -150 | 250 | mA | -60V ≤ (Y or Z) ≤ 60V (Figure 2) | 2 | |
| Receiver Input Resistance | RIN | 112 | kΩ | 0V ≤ VCC ≤ 5.5V (Figure 3) | 2 | ||
| Receiver Common Mode Input Voltage | VCM | -25 | 25 | V | 2 | ||
| Differential Input Signal Threshold | VTH | -200 | 200 | mV | -25V < VCM < 25V (Note 2) | 3 | |
| Digital Input Capacitance | CIN | 10 | pF | Note 2 | 3 | ||
| Digital Input Current (ON, REMOTE, SPEED1, SPEED2) | IIN | -60 | 60 | µA | VIN = 0V to VL | 3 | |
| Digital Input Current (SCK, MOSI, SS1, SS2, SS3, SSC) | IIN | -60 | 60 | µA | VIN = 0V to VL, REMOTE = 0 | 3 | |
| Digital Input Current (MISO) | IIN | -60 | 60 | µA | VIN = 0V to VL, REMOTE = 1 | 3 | |
| Digital Input Current (INT) | IIN | -5 | 5 | µA | VIN = 0V to VL, REMOTE = 1 | 3 | |
| Output Source Current (Short-Circuit) | IOUT | -80 | 80 | mA | 3 | ||
| High-Z Output Leakage Current (LINK, INT) | IOZ | -5 | 5 | µA | 3 | ||
| High-Z Output Leakage Current (MOSI) | IOZ | -60 | 60 | µA | REMOTE = 1 | 3 | |
| High-Z Output Leakage Current (MISO) | IOZ | -60 | 60 | µA | REMOTE = 0 | 3 | |
| Pulse Width of ON low for Valid Reset Condition | tON_LOW | 1 | µs | Figure 6 | 3 | ||
| ON Rise to Control Interface (SSC) Ready | tREADY | 15 | µs | 3 | |||
| Delay from Local ON Low for Valid Remote Reset Condition | tREMOTE_RESET | 180 | ms | 3 | |||
| Logic Output Rise/Fall (SCK, MISO, MOSI) | tR, tF | 8 | ns | CL = 20pF | 3 | ||
| SCK Input Frequency (SPEED INDEX = 8) | fSCK:SLAVE | 10 | 2000 | kHz | Local Mode (REMOTE = 0), Table 2 | 4 | |
| SCK Input High Time | tSCKH:SLAVE | 100 | ns | Figure 7 | 4 | ||
| SCK Input Low Time | tSCKL:SLAVE | 100 | ns | 4 | |||
| MISO Data Valid from SCK Fall Delay | tDMISO:SLAVE | 100 | ns | CL = 20pF | 4 | ||
| MISO Data Remains Valid from SCK Fall Delay | tHMISO:SLAVE | 40 | ns | CL = 20pF | 4 | ||
| MOSI Data Setup to SCK Rise | tSMOSI:SLAVE | 40 | ns | 4 | |||
| MOSI Data Hold after SCK Rise | tHMOSI:SLAVE | 40 | ns | 4 | |||
| MASTER SCK Cycle to Cycle Jitter | tSCKJ:MASTER | -30 | 30 | ns | Figure 8 | 4 | |
| MASTER MOSI Data Valid from SCK Fall Delay | tDMOSI:MASTER | 15 | ns | CL = 20pF | 4 | ||
| MASTER MOSI Data Remains Valid from SCK Fall Delay | tHMOSI:MASTER | -5 | ns | CL = 20pF | 4 | ||
| MASTER MISO Data Setup to SCK Rise | tSMISO:MASTER | 40 | ns | 4 | |||
| MASTER MISO Data Hold after SCK Rise | tHMISO:MASTER | 40 | ns | 4 | |||
| MASTER Active Slave Select Timeout | tTIMEOUT:MASTER | 148 | 175 | ms | 4 | ||
| Differential Driver Rise or Fall Time | tRD, tFD | 4 | 15 | ns | RDIFF = 54Ω, CL = 100pF | 4 | |
| Response Time for LINK Release after Disconnection, REMOTE = 1 | tLINK_TIMEOUT | 168 | ms | REMOTE = 1 | 4 | ||
| Response Time for LINK Release after Disconnection, REMOTE = 0 | tLINK_TIMEOUT | 100 | µs | REMOTE = 0 | 4 |
CAD (KiCad official)
- Symbol:
LTC4332IUFD#PBF - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: QFN-20-EP(4x5) (KiCad packages3D, STEP)
- 3D model files:
ltc4332iufd-pbf-etched.step/ltc4332iufd-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4332iufd-pbf.step/ltc4332iufd-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (22 pp, sha256
83bc7d57f3c5250e, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC4332IUFD#PBF
**Analog Devices** · Signal Buffers, Repeaters, Splitters · QFN-20-EP(4x5)
LTC4332IUFD#PBF from Analog Devices, in a QFN-20-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Main supply voltage, 3.0V ≤ VCC ≤ 5.5V; bypass with 4.7µF ceramic capacitor to GND. |
| 2 | VL | power_in | Logic interface supply voltage, 1.62V ≤ VL ≤ 5.5V; bypass with 1µF ceramic capacitor to GND. |
| 3 | ON | input | Enable input; set high for operation, set low for low-power mode where the internal reset is held and outputs are disabled; connect to VL if unused. |
| 4 | REMOTE | input | Operating mode select; set low for local SPI slave mode and high for SPI master mode on the remote side; weakly pulled to GND. |
| 5 | LINK | output | Open-drain link status output driven low when link communication is established; requires external pull-up to VL if monitored, otherwise float or connect to GND. |
| 6 | SSC | input | Active-low control interface slave select that must be set high when the SPI bus is idle; used only in local mode, weakly pulled to VL and may be left unconnected, and left unconnected in remote mode. |
| 7 | SCK | bidirectional | Serial port clock: an input in local mode (MOSI captured on rising edge, MISO updated on falling edge) and an output providing the clock to remote devices in remote mode. |
| 8 | MOSI | bidirectional | Master Out Slave In: serial data input for the slave selects in local mode (captured on SCK rising edge) and serial data output in remote mode; contains a weak bus-hold. |
| 9 | MISO | bidirectional | Master In Slave Out: serial data output for the slave selects in local mode (driver disabled when SS1-3 and SSC are high) and serial data input in remote mode, weakly pulled to VL; contains a weak bus-hold. |
| 10 | INT | bidirectional | Remote-to-local interrupt: open-drain output in local mode and input in remote mode, also the level-sensitive active-low interrupt for the control interface; connect pull-up to VL on the local side and do not allow to float on the remote side. |
| 11 | SS1 | bidirectional | Remote slave select 1 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 12 | SS2 | bidirectional | Remote slave select 2 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 13 | SS3 | bidirectional | Remote slave select 3 (active low): an input in local mode that starts a remote SPI transfer when set low, and an output to a remote SPI device in remote mode; must be high when the SPI bus is idle and is weakly pulled to VL. |
| 14 | SPEED1 | input | 3-state input which, together with SPEED2, selects link baud rate and remote SCK timing parameters; set high, low, or float as defined in Table 2. |
| 15 | SPEED2 | input | 3-state input which, together with SPEED1, selects link baud rate and remote SCK timing parameters; set high, low, or float as defined in Table 2. |
| 16 | GND | power_in | Ground; connect to GND. |
| 17 | Y | output | Non-inverting link driver output; connect to the A pin of a second LTC4332 set to the opposite mode. |
| 18 | Z | output | Inverting link driver output; connect to the B pin of a second LTC4332 set to the opposite mode. |
| 19 | B | input | Inverting link receiver input; connect to the Z pin of the second LTC4332 set to the opposite mode. |
| 20 | A | input | Non-inverting link receiver input; connect to the Y pin of the second LTC4332 set to the opposite mode. |
| 21 | GND | power_in | Exposed pad on the package bottom is GND and must be soldered to the PCB. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-20-EP(4x5) |
| Category | Interface ICs |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Range (VCC) | VCC | 3 | | 5.5 | V | | 2 |
| Logic Interface Supply Range (VL) | VL | 1.62 | | 5.5 | V | | 2 |
| Operating Temperature Range, LTC4332I grade | TA | -40 | | 85 | °C | LTC4332I | 2 |
| Supply Voltage VCC absolute maximum | VCC | -0.3 | | 6 | V | | 2 |
| Supply Voltage VL absolute maximum | VL | -0.3 | | 6 | V | | 2 |
| Logic Signals ON, LINK, INT, SSC absolute maximum | | -0.3 | | 6 | V | | 2 |
| Interface I/O A, B, Y, Z absolute maximum | | -60 | | 60 | V | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Maximum Junction Temperature | TJMAX | | | 150 | °C | | 2 |
| Thermal Resistance Junction-to-Ambient | θJA | | 43 | | °C/W | | 2 |
| Thermal Resistance Junction-to-Case | θJC | | 3.4 | | °C/W | | 2 |
| Operating Supply Current, Low Power | ICC | | 1 | 40 | µA | Low Power: ON = 0 | 2 |
| Operating Supply Current, Idle | ICC | | | 12 | mA | Idle: ON = 1, Idle SPI | 2 |
| Operating Supply Current, Active | ICC | | | 120 | mA | Active: SCK = 2MHz, SPEED INDEX = 8 (Note 7) | 2 |
| Logic Supply Current | IL | -140 | | 140 | µA | | 2 |
| Differential Driver Output Voltage, no load | /VOD/ | 1.5 | | | V | R = ∞ | 2 |
| Differential Driver Output Voltage, R = 27Ω | /VOD/ | 1.5 | | 5 | V | R = 27Ω (Figure 1) | 2 |
| Maximum Driver Short-Circuit Current | IOSD | -150 | | 250 | mA | -60V ≤ (Y or Z) ≤ 60V (Figure 2) | 2 |
| Receiver Input Resistance | RIN | | 112 | | kΩ | 0V ≤ VCC ≤ 5.5V (Figure 3) | 2 |
| Receiver Common Mode Input Voltage | VCM | -25 | | 25 | V | | 2 |
| Differential Input Signal Threshold | VTH | -200 | | 200 | mV | -25V < VCM < 25V (Note 2) | 3 |
| Digital Input Capacitance | CIN | | 10 | | pF | Note 2 | 3 |
| Digital Input Current (ON, REMOTE, SPEED1, SPEED2) | IIN | -60 | | 60 | µA | VIN = 0V to VL | 3 |
| Digital Input Current (SCK, MOSI, SS1, SS2, SS3, SSC) | IIN | -60 | | 60 | µA | VIN = 0V to VL, REMOTE = 0 | 3 |
| Digital Input Current (MISO) | IIN | -60 | | 60 | µA | VIN = 0V to VL, REMOTE = 1 | 3 |
| Digital Input Current (INT) | IIN | -5 | | 5 | µA | VIN = 0V to VL, REMOTE = 1 | 3 |
| Output Source Current (Short-Circuit) | IOUT | -80 | | 80 | mA | | 3 |
| High-Z Output Leakage Current (LINK, INT) | IOZ | -5 | | 5 | µA | | 3 |
| High-Z Output Leakage Current (MOSI) | IOZ | -60 | | 60 | µA | REMOTE = 1 | 3 |
| High-Z Output Leakage Current (MISO) | IOZ | -60 | | 60 | µA | REMOTE = 0 | 3 |
| Pulse Width of ON low for Valid Reset Condition | tON_LOW | | 1 | | µs | Figure 6 | 3 |
| ON Rise to Control Interface (SSC) Ready | tREADY | | 15 | | µs | | 3 |
| Delay from Local ON Low for Valid Remote Reset Condition | tREMOTE_RESET | | 180 | | ms | | 3 |
| Logic Output Rise/Fall (SCK, MISO, MOSI) | tR, tF | | 8 | | ns | CL = 20pF | 3 |
| SCK Input Frequency (SPEED INDEX = 8) | fSCK:SLAVE | 10 | | 2000 | kHz | Local Mode (REMOTE = 0), Table 2 | 4 |
| SCK Input High Time | tSCKH:SLAVE | | 100 | | ns | Figure 7 | 4 |
| SCK Input Low Time | tSCKL:SLAVE | | 100 | | ns | | 4 |
| MISO Data Valid from SCK Fall Delay | tDMISO:SLAVE | | 100 | | ns | CL = 20pF | 4 |
| MISO Data Remains Valid from SCK Fall Delay | tHMISO:SLAVE | | 40 | | ns | CL = 20pF | 4 |
| MOSI Data Setup to SCK Rise | tSMOSI:SLAVE | | 40 | | ns | | 4 |
| MOSI Data Hold after SCK Rise | tHMOSI:SLAVE | | 40 | | ns | | 4 |
| MASTER SCK Cycle to Cycle Jitter | tSCKJ:MASTER | -30 | | 30 | ns | Figure 8 | 4 |
| MASTER MOSI Data Valid from SCK Fall Delay | tDMOSI:MASTER | | 15 | | ns | CL = 20pF | 4 |
| MASTER MOSI Data Remains Valid from SCK Fall Delay | tHMOSI:MASTER | | -5 | | ns | CL = 20pF | 4 |
| MASTER MISO Data Setup to SCK Rise | tSMISO:MASTER | | 40 | | ns | | 4 |
| MASTER MISO Data Hold after SCK Rise | tHMISO:MASTER | | 40 | | ns | | 4 |
| MASTER Active Slave Select Timeout | tTIMEOUT:MASTER | 148 | | 175 | ms | | 4 |
| Differential Driver Rise or Fall Time | tRD, tFD | | 4 | 15 | ns | RDIFF = 54Ω, CL = 100pF | 4 |
| Response Time for LINK Release after Disconnection, REMOTE = 1 | tLINK_TIMEOUT | | 168 | | ms | REMOTE = 1 | 4 |
| Response Time for LINK Release after Disconnection, REMOTE = 0 | tLINK_TIMEOUT | | 100 | | µs | REMOTE = 0 | 4 |
## CAD (KiCad official)
- Symbol: `LTC4332IUFD#PBF`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm`
- 3D model: QFN-20-EP(4x5) (KiCad packages3D, STEP)
- 3D model files: `ltc4332iufd-pbf-etched.step` / `ltc4332iufd-pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc4332iufd-pbf.step` / `ltc4332iufd-pbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/LTC4332.pdf) (22 pp, sha256 `83bc7d57f3c5250e`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc4332iufd-pbf-datasheet.pdf)