component
LTC4313IMS8-3#PBF
Public Made by Adomby adom
Analog Devices Signal Buffers, Repeaters, Splitters, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
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| ltc4313ims8-3-pbf-etched.glb | 11d ago |
| ltc4313ims8-3-pbf-etched.step | 11d ago |
| ltc4313ims8-3-pbf-hero.glb | 11d ago |
| ltc4313ims8-3-pbf-hero.overlay.json | 11d ago |
| ltc4313ims8-3-pbf.glb | 11d ago |
| ltc4313ims8-3-pbf.kicad_mod | 11d ago |
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| ltc4313ims8-3-pbf.lbr | 11d ago |
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| package.json | 11d ago |
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| verification.json | 11d ago |
LTC4313IMS8-3#PBF
Analog Devices · Signal Buffers, Repeaters, Splitters · MSOP-8
LTC4313IMS8-3#PBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENABLE | input | Connection enable input; low isolates SDAIN/SCLIN from SDAOUT/SCLOUT, asserts READY low and disables rise time accelerators, high connects the buses after a stop bit or bus idle is detected; connect to VCC if unused (10k to GND for staggered-pin Hot Swap). |
| 2 | SCLOUT | bidirectional | Serial bus 2 clock input/output, connected to the SCL segment where stuck low recovery is desired, needs an external pull-up and must not be left open. |
| 3 | SCLIN | bidirectional | Serial bus 1 clock input/output connected to the upstream SCL line, needs an external pull-up (bus supply need not be ≥ VCC for the LTC4313-3) and must not be left open. |
| 4 | GND | power_in | Device ground. |
| 5 | READY | output | Open-drain N-channel connection ready status output that pulls low when input and output sides are disconnected, typically pulled up with 10k to the bus supply, and may be left open or tied to GND if unused (absolute max 6V, 50mA sink). |
| 6 | SDAIN | bidirectional | Serial bus 1 data input/output connected to the upstream SDA line, needs an external pull-up (bus supply need not be ≥ VCC for the LTC4313-3) and must not be left open. |
| 7 | SDAOUT | bidirectional | Serial bus 2 data input/output, connected to the SDA segment where stuck low recovery is desired, needs an external pull-up and must not be left open. |
| 8 | VCC | power_in | Power supply input from 2.9V to 5.5V, bypass with at least 0.01µF to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.3 | 6 | V | 2 | ||
| Input Voltage ENABLE | -0.3 | 6 | V | 2 | |||
| Input/Output Voltages SDAIN, SDAOUT, SCLIN, SCLOUT | -0.3 | 6 | V | 2 | |||
| Output Voltage READY | -0.3 | 6 | V | 2 | |||
| Output Sink Current READY | 50 | mA | 2 | ||||
| Operating Ambient Temperature Range (LTC4313I) | -40 | 85 | °C | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | MS Package | 2 | |||
| Maximum Junction Temperature | TJMAX | 150 | °C | MS8 package | 2 | ||
| Thermal Resistance Junction to Ambient | θJA | 163 | °C/W | MS8 package | 2 | ||
| Input Supply Voltage | VCC | 2.9 | 5.5 | V | 3 | ||
| 2-Wire Bus Supply Voltage | VDD,BUS | 1.4 | 5.5 | V | LTC4313-3 | 3 | |
| Input Supply Current | ICC | 6 | 8.1 | 10 | mA | VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V (Note 3) | 3 |
| Input Supply Current (disabled) | ICC(DISABLED) | 2.5 | 3.5 | 4.5 | mA | VENABLE = 0V, VCC = 5.5V, VSDAIN,SCLIN = 0V | 3 |
| VCC UVLO Threshold | VTH_UVLO | 2.55 | 2.7 | 2.85 | V | VCC Rising | 3 |
| UVLO Threshold Hysteresis Voltage | VCC_UVLO(HYST) | 200 | mV | 3 | |||
| Precharge Voltage | VPRE | 0.8 | 1 | 1.2 | V | SDA, SCL Pins Open | 3 |
| Buffer Offset Voltage | VOS(SAT) | 100 | 190 | 280 | mV | IOL = 4mA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage | VOS(SAT) | 15 | 60 | 120 | mV | IOL = 500µA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage | VOS | 50 | 120 | 180 | mV | IOL = 4mA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Offset Voltage | VOS | 15 | 60 | 115 | mV | IOL = 500µA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Input Logic Low Voltage (as printed, multiples of VCC) | VIL, FALLING | 0.3 | 0.33 | 0.36 | V | VCC = 2.9V, 3.3V, 5.5V; values printed as 0.3•VCC / 0.33•VCC / 0.36•VCC | 3 |
| VIL Hysteresis Voltage | ∆VIL(HYST) | 50 | mV | 3 | |||
| Input Leakage Current | ILEAK | -10 | 10 | µA | SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V | 3 | |
| Input Capacitance | CIN | 10 | pF | SDA, SCL Pins (Note 4) | 3 | ||
| ENABLE Threshold Voltage | VEN(TH) | 1 | 1.4 | 1.8 | V | 3 | |
| ENABLE Leakage Current | ILEAK | -10 | 0.1 | 10 | µA | VENABLE = 5.5V | 3 |
| READY Output Low Voltage | VREADY(OL) | 0.4 | V | IREADY = 3mA, VCC = 5V | 3 | ||
| READY Off Leakage Current | IREADY(OH) | -5 | 0.1 | 5 | µA | VCC = VREADY = 5V | 3 |
| Bus Stuck Low Timer | tTIMEOUT | 35 | 45 | 55 | ms | 3 | |
| I2C Frequency Max | fSCL(MAX) | 400 | kHz | 3 | |||
| SCL, SDA Fall Delay | tPDHL | 130 | 250 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 | |
| SCL, SDA Fall Times | tf | 20 | 300 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 | |
| Bus Idle Time | tIDLE | 55 | 95 | 175 | µs | 3 |
CAD (KiCad official)
- Symbol:
LTC4313IMS8-3#PBF - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
ltc4313ims8-3-pbf-etched.step/ltc4313ims8-3-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4313ims8-3-pbf.step/ltc4313ims8-3-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
0a65a78c3f78e5a1, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).