component
LTC4313IMS8-1#PBF
Public Made by Adomby adom
Analog Devices Signal Buffers, Repeaters, Splitters, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTC4313IMS8-1#PBF
Analog Devices · Signal Buffers, Repeaters, Splitters · MSOP-8
LTC4313IMS8-1#PBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENABLE | input | Connection enable input: driving it low isolates SDAIN/SCLIN from SDAOUT/SCLOUT and asserts READY low, while driving it high connects the buses after a stop bit or bus idle is detected; connect a 10k resistor to GND when used with staggered Hot Swap connector pins, or connect to VCC if unused. |
| 2 | SCLOUT | bidirectional | Serial bus 2 clock input/output for the SCL segment where stuck-low recovery is desired, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 3 | SCLIN | bidirectional | Serial bus 1 clock input/output connected to the upstream SCL line, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 4 | GND | power_in | Device ground. |
| 5 | READY | output | Open-drain N-channel connection-ready status output that pulls low when the input and output sides are disconnected, typically used with a 10k pull-up to the bus pull-up supply, and may be left open or tied to GND if unused (READY sink current is rated to 50mA absolute maximum). |
| 6 | SDAIN | bidirectional | Serial bus 1 data input/output connected to the upstream SDA line, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 7 | SDAOUT | bidirectional | Serial bus 2 data input/output for the SDA segment where stuck-low recovery is desired, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 8 | VCC | power_in | Power supply input, to be powered from 2.9V to 5.5V and bypassed with at least 0.01µF to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Input Supply Voltage | VCC | 2.9 | 5.5 | V | 3 | ||
| 2-Wire Bus Supply Voltage (LTC4313-1, LTC4313-2) | VDD,BUS | 2.9 | 5.5 | V | LTC4313-1, LTC4313-2 | 3 | |
| Input Supply Current | ICC | 6 | 8.1 | 10 | mA | VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V (Note 3) | 3 |
| Input Supply Current (disabled) | ICC(DISABLED) | 2.5 | 3.5 | 4.5 | mA | VENABLE = 0V, VCC = 5.5V, VSDAIN,SCLIN = 0V | 3 |
| VCC UVLO Threshold | VTH_UVLO | 2.55 | 2.7 | 2.85 | V | VCC Rising | 3 |
| Precharge Voltage | VPRE | 0.8 | 1 | 1.2 | V | SDA, SCL Pins Open | 3 |
| Buffer Offset Voltage (saturation) | VOS(SAT) | 100 | 190 | 280 | mV | IOL = 4mA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage (saturation) | VOS(SAT) | 15 | 60 | 120 | mV | IOL = 500µA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage | VOS | 50 | 120 | 180 | mV | IOL = 4mA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Offset Voltage | VOS | 15 | 60 | 115 | mV | IOL = 500µA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Input Logic Low Voltage (falling) | VIL, FALLING | 0.3 | 0.33 | 0.36 | •VCC | VCC = 2.9V, 3.3V, 5.5V; printed as multiple of VCC | 3 |
| Input Leakage Current (SDA, SCL) | ILEAK | -10 | 10 | µA | SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V | 3 | |
| Minimum Slew Rate Requirement (RTA) | dV/dt(RTA) | 0.1 | 0.2 | 0.4 | V/µs | SDA, SCL Pins, VCC = 5V (LTC4313-1 and LTC4313-2) | 3 |
| Rise Time Accelerator DC Threshold Voltage | VRTA(TH) | 0.38 | 0.41 | 0.44 | •VCC | VCC = 5V; printed as multiple of VCC | 3 |
| Buffers Off to Accelerator On Voltage | ∆VACC | 0.05 | 0.07 | mV | SDA, SCL Pins, VCC = 5V | 3 | |
| Rise Time Accelerator Pull-Up Current (LTC4313-1) | IRTA | 15 | 25 | 40 | mA | SDA, SCL Pins, VCC = 5V (Note 5); LTC4313-1 | 3 |
| ENABLE Threshold Voltage | VEN(TH) | 1 | 1.4 | 1.8 | V | 3 | |
| ENABLE Leakage Current | ILEAK | -10 | 10 | µA | VENABLE = 5.5V | 3 | |
| READY Off Leakage Current | IREADY(OH) | -5 | 5 | µA | VCC = VREADY = 5V | 3 | |
| Bus Stuck Low Timer | tTIMEOUT | 35 | 45 | 55 | ms | 3 | |
| I2C Frequency Max | fSCL(MAX) | 400 | kHz | 3 | |||
| SCL, SDA Fall Delay | tPDHL | 130 | 250 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 | |
| SCL, SDA Fall Times | tf | 20 | 300 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 | |
| Bus Idle Time | tIDLE | 55 | 95 | 175 | µs | 3 | |
| Supply Voltage | VCC | -0.3 | 6 | V | 2 | ||
| Input Voltage ENABLE | -0.3 | 6 | V | 2 | |||
| Input/Output Voltages SDAIN, SDAOUT, SCLIN, SCLOUT | -0.3 | 6 | V | 2 | |||
| Output Voltage READY | -0.3 | 6 | V | 2 | |||
| Output Sink Current READY | 50 | mA | (Notes 1, 2) | 2 | |||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | MS Package | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Operating Ambient Temperature Range (LTC4313I) | -40 | 85 | °C | LTC4313I grade | 2 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | MS8 package | 2 | ||
| Thermal Resistance, Junction to Ambient | θJA | 163 | °C/W | MS8 package | 2 |
CAD (KiCad official)
- Symbol:
LTC4313IMS8-1#PBF - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
ltc4313ims8-1-pbf-etched.step/ltc4313ims8-1-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4313ims8-1-pbf.step/ltc4313ims8-1-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
0a65a78c3f78e5a1, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC4313IMS8-1#PBF
**Analog Devices** · Signal Buffers, Repeaters, Splitters · MSOP-8
LTC4313IMS8-1#PBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENABLE | input | Connection enable input: driving it low isolates SDAIN/SCLIN from SDAOUT/SCLOUT and asserts READY low, while driving it high connects the buses after a stop bit or bus idle is detected; connect a 10k resistor to GND when used with staggered Hot Swap connector pins, or connect to VCC if unused. |
| 2 | SCLOUT | bidirectional | Serial bus 2 clock input/output for the SCL segment where stuck-low recovery is desired, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 3 | SCLIN | bidirectional | Serial bus 1 clock input/output connected to the upstream SCL line, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 4 | GND | power_in | Device ground. |
| 5 | READY | output | Open-drain N-channel connection-ready status output that pulls low when the input and output sides are disconnected, typically used with a 10k pull-up to the bus pull-up supply, and may be left open or tied to GND if unused (READY sink current is rated to 50mA absolute maximum). |
| 6 | SDAIN | bidirectional | Serial bus 1 data input/output connected to the upstream SDA line, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 7 | SDAOUT | bidirectional | Serial bus 2 data input/output for the SDA segment where stuck-low recovery is desired, requiring an external pull-up resistor or current source to the bus supply, which must be ≥ VCC for the LTC4313-1 and LTC4313-2 but not the LTC4313-3, and must not be left open. |
| 8 | VCC | power_in | Power supply input, to be powered from 2.9V to 5.5V and bypassed with at least 0.01µF to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Input Supply Voltage | VCC | 2.9 | | 5.5 | V | | 3 |
| 2-Wire Bus Supply Voltage (LTC4313-1, LTC4313-2) | VDD,BUS | 2.9 | | 5.5 | V | LTC4313-1, LTC4313-2 | 3 |
| Input Supply Current | ICC | 6 | 8.1 | 10 | mA | VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V (Note 3) | 3 |
| Input Supply Current (disabled) | ICC(DISABLED) | 2.5 | 3.5 | 4.5 | mA | VENABLE = 0V, VCC = 5.5V, VSDAIN,SCLIN = 0V | 3 |
| VCC UVLO Threshold | VTH_UVLO | 2.55 | 2.7 | 2.85 | V | VCC Rising | 3 |
| Precharge Voltage | VPRE | 0.8 | 1 | 1.2 | V | SDA, SCL Pins Open | 3 |
| Buffer Offset Voltage (saturation) | VOS(SAT) | 100 | 190 | 280 | mV | IOL = 4mA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage (saturation) | VOS(SAT) | 15 | 60 | 120 | mV | IOL = 500µA, Driven VSDA,SCL = 50mV | 3 |
| Buffer Offset Voltage | VOS | 50 | 120 | 180 | mV | IOL = 4mA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Offset Voltage | VOS | 15 | 60 | 115 | mV | IOL = 500µA, Driven VSDA,SCL = 200mV | 3 |
| Buffer Input Logic Low Voltage (falling) | VIL, FALLING | 0.3 | 0.33 | 0.36 | •VCC | VCC = 2.9V, 3.3V, 5.5V; printed as multiple of VCC | 3 |
| Input Leakage Current (SDA, SCL) | ILEAK | -10 | | 10 | µA | SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V | 3 |
| Minimum Slew Rate Requirement (RTA) | dV/dt(RTA) | 0.1 | 0.2 | 0.4 | V/µs | SDA, SCL Pins, VCC = 5V (LTC4313-1 and LTC4313-2) | 3 |
| Rise Time Accelerator DC Threshold Voltage | VRTA(TH) | 0.38 | 0.41 | 0.44 | •VCC | VCC = 5V; printed as multiple of VCC | 3 |
| Buffers Off to Accelerator On Voltage | ∆VACC | 0.05 | | 0.07 | mV | SDA, SCL Pins, VCC = 5V | 3 |
| Rise Time Accelerator Pull-Up Current (LTC4313-1) | IRTA | 15 | 25 | 40 | mA | SDA, SCL Pins, VCC = 5V (Note 5); LTC4313-1 | 3 |
| ENABLE Threshold Voltage | VEN(TH) | 1 | 1.4 | 1.8 | V | | 3 |
| ENABLE Leakage Current | ILEAK | -10 | | 10 | µA | VENABLE = 5.5V | 3 |
| READY Off Leakage Current | IREADY(OH) | -5 | | 5 | µA | VCC = VREADY = 5V | 3 |
| Bus Stuck Low Timer | tTIMEOUT | 35 | 45 | 55 | ms | | 3 |
| I2C Frequency Max | fSCL(MAX) | | | 400 | kHz | | 3 |
| SCL, SDA Fall Delay | tPDHL | | 130 | 250 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 |
| SCL, SDA Fall Times | tf | | 20 | 300 | ns | VCC = VDD,BUS = 5V, CBUS = 100pF, RBUS = 10kΩ (Note 4) | 3 |
| Bus Idle Time | tIDLE | 55 | 95 | 175 | µs | | 3 |
| Supply Voltage | VCC | -0.3 | | 6 | V | | 2 |
| Input Voltage ENABLE | | -0.3 | | 6 | V | | 2 |
| Input/Output Voltages SDAIN, SDAOUT, SCLIN, SCLOUT | | -0.3 | | 6 | V | | 2 |
| Output Voltage READY | | -0.3 | | 6 | V | | 2 |
| Output Sink Current READY | | | | 50 | mA | (Notes 1, 2) | 2 |
| Lead Temperature (Soldering, 10 sec) | | | | 300 | °C | MS Package | 2 |
| Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Operating Ambient Temperature Range (LTC4313I) | | -40 | | 85 | °C | LTC4313I grade | 2 |
| Maximum Junction Temperature | TJMAX | | | 150 | °C | MS8 package | 2 |
| Thermal Resistance, Junction to Ambient | θJA | | | 163 | °C/W | MS8 package | 2 |
## CAD (KiCad official)
- Symbol: `LTC4313IMS8-1#PBF`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ltc4313ims8-1-pbf-etched.step` / `ltc4313ims8-1-pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc4313ims8-1-pbf.step` / `ltc4313ims8-1-pbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/4313123f.pdf) (20 pp, sha256 `0a65a78c3f78e5a1`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc4313ims8-1-pbf-datasheet.pdf)