component
LTC4121IUD#PBF
Public Made by Adomby adom
Analog Devices Battery Management, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
LTC4121IUD#PBF
Analog Devices · Battery Management · QFN-16-EP(3x3)
LTC4121IUD#PBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INTVCC | power_out | Internal LDO regulator output that powers the switch gate drivers and the low battery charge current; connect a 2.2µF low ESR capacitor to GND and place no external load on it other than the NTC bias network. |
| 2 | BOOST | power_out | Boosted supply pin with a 22nF boost capacitor connected from BOOST to SW; absolute maximum is VSW - 0.3V to (VSW + 6V). |
| 3 | IN | power_in | Positive input supply operating from 4.4V to 40V, decoupled to GND with a 10µF or larger low ESR capacitor; absolute maximum for IN is -0.3V to 43V. |
| 4 | SW | output | Switch pin that delivers power from IN to BAT through the step-down regulator; an inductor connects from SW to CHGSNS, with DC limits of -0.3V to (VIN + 0.3V). |
| 5 | GND | power_in | Ground pin that must be connected to the exposed pad, which must be soldered to PCB ground for low electrical and thermal impedance. |
| 6 | MPPT | input | Maximum power point tracking input that uses an external resistive divider from VIN to GND to set the regulated input voltage as a percentage of open-circuit voltage; if unused, connect to INTVCC or IN through a minimum 10k resistor. |
| 7 | FREQ | input | Switching frequency select that connects to INTVCC for 1.5MHz or GND for 750kHz operation, and must not be left floating. |
| 8 | CHGSNS | input | Battery charge current sense pin; an internal sense resistor (0.3Ω typical) between CHGSNS and BAT monitors charge current, with absolute maximum -0.3V to 18V. |
| 9 | BAT | power_out | Battery output pin that delivers charge current through the internal sense resistor and must be decoupled with a low ESR 22µF ceramic capacitor to GND. |
| 10 | FB | input | Battery voltage feedback pin (LTC4121 only) that regulates to a 2.4V float voltage through a divider from BAT to FB to FBG, programmable from 3.5V to 18V, with 25nA input bias current. |
| 11 | FBG | passive | Feedback ground pin (LTC4121 only) that presents a low resistance (RFBG) to GND when sensing battery voltage and becomes high impedance in disabled or shutdown modes. |
| 12 | NTC | input | Negative temperature coefficient thermistor input that pauses charging in STANDBY when the battery is out of range; requires a bias resistor from INTVCC and a thermistor to GND, and tying it to GND disables NTC qualified charging. |
| 13 | PROG | bidirectional | Charge current program and monitor pin that uses a 1% resistor from 3.01k (400mA) to 24.3k (50mA) to GND and regulates to 1.227V in constant-current mode; keep parasitic capacitance minimal. |
| 14 | CHRG | output | Open-drain charge status output that is pulled low while charging and sinks up to 5mA when enabled; it goes high impedance when termination occurs or charge current drops below 10% of the programmed value. |
| 15 | FAULT | output | Open-drain fault status output that is pulled low on an NTC temperature fault or bad battery fault and sinks up to 5mA when enabled; it stays high impedance when no fault exists. |
| 16 | RUN | input | Enable pin that disables the charger below its VEN threshold (2.45V typical rising) and enters shutdown below VSD (1.2V maximum falling); it must be tied to a resistive divider from VIN and must not be left floating. |
| 17 | GND | power_in | Exposed pad on the package bottom that is GND and must be soldered to PCB ground to achieve the specified θJA of 54°C/W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input/RUN/CHRG/FAULT/MPPT voltage | IN, RUN, CHRG, FAULT, MPPT | -0.3 | 43 | V | 2 | ||
| CHGSNS, BAT, FB/BATSNS, FBG voltage | CHGSNS, BAT, FB/BATSNS, FBG | -0.3 | 18 | V | 2 | ||
| FREQ, NTC, PROG, INTVCC voltage | FREQ, NTC, PROG, INTVCC | -0.3 | 6 | V | 2 | ||
| Charge/battery sense current | ICHGSNS, IBAT | -600 | 600 | mA | 2 | ||
| Status pin current | ICHRG, IFAULT | -5 | 5 | mA | 2 | ||
| Feedback pin current (LTC4121) | IFB, IFBG | -5 | 5 | mA | LTC4121 | 2 | |
| INTVCC pin current | IINTVCC | -5 | mA | 2 | |||
| Operating junction temperature range | TJ | -40 | 125 | °C | 2 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 2 | ||
| Maximum junction temperature | TJMAX | 125 | °C | 2 | |||
| Thermal resistance, junction to ambient | θJA | 54 | °C/W | Exposed pad soldered to PCB | 2 | ||
| Operating input supply range | IN | 4.4 | 40 | V | 3 | ||
| Battery voltage range | BAT | 0 | 18 | V | LTC4121 (Note 3) | 3 | |
| DC supply current, switching | IIN | 3.5 | mA | Switching: FREQ = GND | 3 | ||
| DC supply current, standby | IIN | 142 | 260 | µA | Standby Mode: (Note 4) | 3 | |
| DC supply current, sleep | IIN | 60 | 110 | µA | LTC4121: VFB = 2.51V (Note 6) | 3 | |
| DC supply current, disabled | IIN | 37 | 80 | µA | Disabled Mode: VSD < VRUN < VEN (Note 4) | 3 | |
| DC supply current, shutdown | IIN | 20 | 40 | µA | Shutdown Mode: (Note 4) | 3 | |
| Differential undervoltage lockout | ΔVDUVLO | 20 | 80 | 160 | mV | VIN, VBAT Falling, VIN = 5V (LTC4121) | 3 |
| INTVCC undervoltage lockout rising threshold | UVINTVCC | 4 | 4.15 | 4.26 | V | INTVCC Rising, VIN = INTVCC + 100mV | 3 |
| BAT standby current (LTC4121) | IBAT | 2.5 | 4.5 | µA | Standby Mode (LTC4121) (Notes 4, 8, 9) | 3 | |
| BAT shutdown current (LTC4121) | IBAT | 1100 | 2000 | nA | Shutdown Mode (LTC4121) (Notes 4, 8, 9) | 3 | |
| Feedback pin bias current (LTC4121) | IFB | 25 | 60 | nA | VFB = 2.5V (Note 6) | 3 | |
| Feedback ground return resistance (LTC4121) | RFBG | 1000 | 2000 | Ω | 3 | ||
| Feedback pin regulation voltage (LTC4121) | VFB(REG) | 2.393 | 2.4 | 2.407 | V | (Note 6) | 3 |
| Feedback pin regulation voltage over temperature (LTC4121) | VFB(REG) | 2.37 | 2.418 | V | 3 | ||
| Battery charge current | ICHG | 383 | 402 | 421 | mA | RPROG = 3.01k | 3 |
| Battery charge current | ICHG | 45 | 50 | 55 | mA | RPROG = 24.3k | 3 |
| Battery recharge threshold (LTC4121) | VRCHG | -38 | -49 | -62 | mV | VFB Falling Relative to VFB(REG) (LTC4121) | 3 |
| PROG pin servo voltage | VPROG | 1.206 | 1.227 | 1.248 | V | 3 | |
| Low battery linear charge current | ILOWBAT | 6 | 9 | 16 | mA | VFB < VTRKL, VBAT = 2.6V (LTC4121) (Note 6) | 4 |
| Trickle charge threshold (LTC4121) | VTRKL | 1.65 | 1.68 | 1.71 | V | VFB Rising (Note 6) | 4 |
| Safety timer termination period | 1.3 | 2 | 2.8 | hrs | 4 | ||
| Bad battery termination timeout | 19 | 30 | 42 | min | 4 | ||
| Switching frequency (high) | fOSC | 1 | 1.5 | 2 | MHz | FREQ = INTVCC | 4 |
| Switching frequency (low) | fOSC | 0.5 | 0.75 | 1 | MHz | FREQ = GND | 4 |
| Peak inductor current limit | IPEAK | 585 | 1050 | 1250 | mA | Measured Across RSNS with a 15µH Inductor in Series with RSNS (Note 10) | 4 |
| Switch pin current | ISW | 15 | 30 | µA | IN Open-Circuit, VBAT = VSW = 8.4V (LTC4121) | 4 | |
| NTC cold temperature rising threshold | VNTC/VINTVCC | 73 | 74 | 75 | %INTVCC | Cold Temperature fault, rising VNTC threshold | 4 |
| NTC hot temperature falling threshold | VNTC/VINTVCC | 35.5 | 36.5 | 37.5 | %INTVCC | Hot Temperature fault, falling VNTC threshold | 4 |
| NTC disable falling threshold | VNTC/VINTVCC | 1 | 2 | 3 | %INTVCC | NTC Disable, falling VNTC threshold | 4 |
| NTC input leakage current | VNTC | -50 | 50 | nA | VNTC = VINTVCC | 4 | |
| RUN enable threshold | VEN | 2.35 | 2.45 | 2.55 | V | VRUN Rising | 5 |
| RUN pin input current | IRUN | 0.01 | 0.1 | µA | VRUN = 40V | 5 | |
| RUN shutdown threshold | VSD | 0.4 | 1.2 | V | VRUN Falling | 5 | |
| FREQ pin input low | VFREQ | 0.4 | V | 5 | |||
| FREQ pin input high | VFREQ | 3.6 | V | 5 | |||
| FREQ pin input current | IFREQ | -1 | 1 | µA | 0 < VFREQ < VINTVCC | 5 | |
| MPPT pin leakage current | IMPPT | 15 | 1000 | nA | VMPPT = 4.2V | 5 | |
| MPPT internal divider gain | KF | 0.098 | 0.1 | 0.102 | V/V | Internal DAC Voltage as a Ratio to VIN | 5 |
| MPPT error amp gain offset | VMP(OS) | 10 | -45 | -100 | mV | VMPPT, VDAC, IBAT = 50%• ICHG | 5 |
| FAULT/CHRG pin leakage current | 0 | 1 | µA | V = 43V, Pin High-Impedance | 4 | ||
| Charge sense resistor (CHGSNS-BAT) | RSNS | 300 | mΩ | IBAT = -100mA | 3 | ||
| Ratio of BAT current to PROG current | hPROG | 988 | mA/mA | VTRKL < VFB < VFB(REG) (LTC4121) | 3 | ||
| Top switch RDSON | RDSON | 0.8 | Ω | ISW = -100mA | 4 | ||
| Bottom switch RDSON | RDSON | 0.5 | Ω | ISW = 100mA | 4 | ||
| Minimum controllable on-time | tMIN_ON | 120 | ns | 4 | |||
| Duty cycle maximum | 94 | % | 4 | ||||
| FAULT/CHRG pin output voltage low | VOL | 550 | mV | I = 2mA | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | to the IN pin with the shortest copper traces possible. | 22 |
CAD (KiCad official)
- Symbol:
LTC4121IUD#PBF - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
ltc4121iud-pbf-etched.step/ltc4121iud-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4121iud-pbf.step/ltc4121iud-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (30 pp, sha256
637cc566763ce54c, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC4121IUD#PBF
**Analog Devices** · Battery Management · QFN-16-EP(3x3)
LTC4121IUD#PBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INTVCC | power_out | Internal LDO regulator output that powers the switch gate drivers and the low battery charge current; connect a 2.2µF low ESR capacitor to GND and place no external load on it other than the NTC bias network. |
| 2 | BOOST | power_out | Boosted supply pin with a 22nF boost capacitor connected from BOOST to SW; absolute maximum is VSW - 0.3V to (VSW + 6V). |
| 3 | IN | power_in | Positive input supply operating from 4.4V to 40V, decoupled to GND with a 10µF or larger low ESR capacitor; absolute maximum for IN is -0.3V to 43V. |
| 4 | SW | output | Switch pin that delivers power from IN to BAT through the step-down regulator; an inductor connects from SW to CHGSNS, with DC limits of -0.3V to (VIN + 0.3V). |
| 5 | GND | power_in | Ground pin that must be connected to the exposed pad, which must be soldered to PCB ground for low electrical and thermal impedance. |
| 6 | MPPT | input | Maximum power point tracking input that uses an external resistive divider from VIN to GND to set the regulated input voltage as a percentage of open-circuit voltage; if unused, connect to INTVCC or IN through a minimum 10k resistor. |
| 7 | FREQ | input | Switching frequency select that connects to INTVCC for 1.5MHz or GND for 750kHz operation, and must not be left floating. |
| 8 | CHGSNS | input | Battery charge current sense pin; an internal sense resistor (0.3Ω typical) between CHGSNS and BAT monitors charge current, with absolute maximum -0.3V to 18V. |
| 9 | BAT | power_out | Battery output pin that delivers charge current through the internal sense resistor and must be decoupled with a low ESR 22µF ceramic capacitor to GND. |
| 10 | FB | input | Battery voltage feedback pin (LTC4121 only) that regulates to a 2.4V float voltage through a divider from BAT to FB to FBG, programmable from 3.5V to 18V, with 25nA input bias current. |
| 11 | FBG | passive | Feedback ground pin (LTC4121 only) that presents a low resistance (RFBG) to GND when sensing battery voltage and becomes high impedance in disabled or shutdown modes. |
| 12 | NTC | input | Negative temperature coefficient thermistor input that pauses charging in STANDBY when the battery is out of range; requires a bias resistor from INTVCC and a thermistor to GND, and tying it to GND disables NTC qualified charging. |
| 13 | PROG | bidirectional | Charge current program and monitor pin that uses a 1% resistor from 3.01k (400mA) to 24.3k (50mA) to GND and regulates to 1.227V in constant-current mode; keep parasitic capacitance minimal. |
| 14 | CHRG | output | Open-drain charge status output that is pulled low while charging and sinks up to 5mA when enabled; it goes high impedance when termination occurs or charge current drops below 10% of the programmed value. |
| 15 | FAULT | output | Open-drain fault status output that is pulled low on an NTC temperature fault or bad battery fault and sinks up to 5mA when enabled; it stays high impedance when no fault exists. |
| 16 | RUN | input | Enable pin that disables the charger below its VEN threshold (2.45V typical rising) and enters shutdown below VSD (1.2V maximum falling); it must be tied to a resistive divider from VIN and must not be left floating. |
| 17 | GND | power_in | Exposed pad on the package bottom that is GND and must be soldered to PCB ground to achieve the specified θJA of 54°C/W. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input/RUN/CHRG/FAULT/MPPT voltage | IN, RUN, CHRG, FAULT, MPPT | -0.3 | | 43 | V | | 2 |
| CHGSNS, BAT, FB/BATSNS, FBG voltage | CHGSNS, BAT, FB/BATSNS, FBG | -0.3 | | 18 | V | | 2 |
| FREQ, NTC, PROG, INTVCC voltage | FREQ, NTC, PROG, INTVCC | -0.3 | | 6 | V | | 2 |
| Charge/battery sense current | ICHGSNS, IBAT | -600 | | 600 | mA | | 2 |
| Status pin current | ICHRG, IFAULT | -5 | | 5 | mA | | 2 |
| Feedback pin current (LTC4121) | IFB, IFBG | -5 | | 5 | mA | LTC4121 | 2 |
| INTVCC pin current | IINTVCC | -5 | | | mA | | 2 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 2 |
| Storage temperature range | TSTG | -65 | | 150 | °C | | 2 |
| Maximum junction temperature | TJMAX | | | 125 | °C | | 2 |
| Thermal resistance, junction to ambient | θJA | | 54 | | °C/W | Exposed pad soldered to PCB | 2 |
| Operating input supply range | IN | 4.4 | | 40 | V | | 3 |
| Battery voltage range | BAT | 0 | | 18 | V | LTC4121 (Note 3) | 3 |
| DC supply current, switching | IIN | | | 3.5 | mA | Switching: FREQ = GND | 3 |
| DC supply current, standby | IIN | | 142 | 260 | µA | Standby Mode: (Note 4) | 3 |
| DC supply current, sleep | IIN | | 60 | 110 | µA | LTC4121: VFB = 2.51V (Note 6) | 3 |
| DC supply current, disabled | IIN | | 37 | 80 | µA | Disabled Mode: VSD < VRUN < VEN (Note 4) | 3 |
| DC supply current, shutdown | IIN | | 20 | 40 | µA | Shutdown Mode: (Note 4) | 3 |
| Differential undervoltage lockout | ΔVDUVLO | 20 | 80 | 160 | mV | VIN, VBAT Falling, VIN = 5V (LTC4121) | 3 |
| INTVCC undervoltage lockout rising threshold | UVINTVCC | 4 | 4.15 | 4.26 | V | INTVCC Rising, VIN = INTVCC + 100mV | 3 |
| BAT standby current (LTC4121) | IBAT | | 2.5 | 4.5 | µA | Standby Mode (LTC4121) (Notes 4, 8, 9) | 3 |
| BAT shutdown current (LTC4121) | IBAT | | 1100 | 2000 | nA | Shutdown Mode (LTC4121) (Notes 4, 8, 9) | 3 |
| Feedback pin bias current (LTC4121) | IFB | | 25 | 60 | nA | VFB = 2.5V (Note 6) | 3 |
| Feedback ground return resistance (LTC4121) | RFBG | | 1000 | 2000 | Ω | | 3 |
| Feedback pin regulation voltage (LTC4121) | VFB(REG) | 2.393 | 2.4 | 2.407 | V | (Note 6) | 3 |
| Feedback pin regulation voltage over temperature (LTC4121) | VFB(REG) | 2.37 | | 2.418 | V | | 3 |
| Battery charge current | ICHG | 383 | 402 | 421 | mA | RPROG = 3.01k | 3 |
| Battery charge current | ICHG | 45 | 50 | 55 | mA | RPROG = 24.3k | 3 |
| Battery recharge threshold (LTC4121) | VRCHG | -38 | -49 | -62 | mV | VFB Falling Relative to VFB(REG) (LTC4121) | 3 |
| PROG pin servo voltage | VPROG | 1.206 | 1.227 | 1.248 | V | | 3 |
| Low battery linear charge current | ILOWBAT | 6 | 9 | 16 | mA | VFB < VTRKL, VBAT = 2.6V (LTC4121) (Note 6) | 4 |
| Trickle charge threshold (LTC4121) | VTRKL | 1.65 | 1.68 | 1.71 | V | VFB Rising (Note 6) | 4 |
| Safety timer termination period | | 1.3 | 2 | 2.8 | hrs | | 4 |
| Bad battery termination timeout | | 19 | 30 | 42 | min | | 4 |
| Switching frequency (high) | fOSC | 1 | 1.5 | 2 | MHz | FREQ = INTVCC | 4 |
| Switching frequency (low) | fOSC | 0.5 | 0.75 | 1 | MHz | FREQ = GND | 4 |
| Peak inductor current limit | IPEAK | 585 | 1050 | 1250 | mA | Measured Across RSNS with a 15µH Inductor in Series with RSNS (Note 10) | 4 |
| Switch pin current | ISW | | 15 | 30 | µA | IN Open-Circuit, VBAT = VSW = 8.4V (LTC4121) | 4 |
| NTC cold temperature rising threshold | VNTC/VINTVCC | 73 | 74 | 75 | %INTVCC | Cold Temperature fault, rising VNTC threshold | 4 |
| NTC hot temperature falling threshold | VNTC/VINTVCC | 35.5 | 36.5 | 37.5 | %INTVCC | Hot Temperature fault, falling VNTC threshold | 4 |
| NTC disable falling threshold | VNTC/VINTVCC | 1 | 2 | 3 | %INTVCC | NTC Disable, falling VNTC threshold | 4 |
| NTC input leakage current | VNTC | -50 | | 50 | nA | VNTC = VINTVCC | 4 |
| RUN enable threshold | VEN | 2.35 | 2.45 | 2.55 | V | VRUN Rising | 5 |
| RUN pin input current | IRUN | | 0.01 | 0.1 | µA | VRUN = 40V | 5 |
| RUN shutdown threshold | VSD | 0.4 | | 1.2 | V | VRUN Falling | 5 |
| FREQ pin input low | VFREQ | | | 0.4 | V | | 5 |
| FREQ pin input high | VFREQ | 3.6 | | | V | | 5 |
| FREQ pin input current | IFREQ | -1 | | 1 | µA | 0 < VFREQ < VINTVCC | 5 |
| MPPT pin leakage current | IMPPT | | 15 | 1000 | nA | VMPPT = 4.2V | 5 |
| MPPT internal divider gain | KF | 0.098 | 0.1 | 0.102 | V/V | Internal DAC Voltage as a Ratio to VIN | 5 |
| MPPT error amp gain offset | VMP(OS) | 10 | -45 | -100 | mV | VMPPT, VDAC, IBAT = 50%• ICHG | 5 |
| FAULT/CHRG pin leakage current | | | 0 | 1 | µA | V = 43V, Pin High-Impedance | 4 |
| Charge sense resistor (CHGSNS-BAT) | RSNS | | 300 | | mΩ | IBAT = -100mA | 3 |
| Ratio of BAT current to PROG current | hPROG | | 988 | | mA/mA | VTRKL < VFB < VFB(REG) (LTC4121) | 3 |
| Top switch RDSON | RDSON | | 0.8 | | Ω | ISW = -100mA | 4 |
| Bottom switch RDSON | RDSON | | 0.5 | | Ω | ISW = 100mA | 4 |
| Minimum controllable on-time | tMIN_ON | | 120 | | ns | | 4 |
| Duty cycle maximum | | | 94 | | % | | 4 |
| FAULT/CHRG pin output voltage low | VOL | | 550 | | mV | I = 2mA | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | to the IN pin with the shortest copper traces possible. | 22 |
## CAD (KiCad official)
- Symbol: `LTC4121IUD#PBF`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `ltc4121iud-pbf-etched.step` / `ltc4121iud-pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc4121iud-pbf.step` / `ltc4121iud-pbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041888461017088) (30 pp, sha256 `637cc566763ce54c`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc4121iud-pbf-datasheet.pdf)