component
LTC4121EUD#TRPBF
Public Made by Adomby adom
Analog Devices Battery Management ICs, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LTC4121EUD#TRPBF
Analog Devices · Battery Management ICs · QFN-16-EP(3x3)
LTC4121EUD#TRPBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INTVCC | power_out | Output of the internal LDO from IN that supplies the gate drivers and ILOWBAT; needs a 2.2µF low-ESR capacitor to GND and no external load other than the NTC bias network. |
| 2 | BOOST | passive | Boosted supply pin; connect a 22nF boost capacitor from this pin to SW. |
| 3 | IN | power_in | Positive input supply (4.4V to 40V); decouple to GND with a 10µF or larger low-ESR capacitor that must settle within the ~36ms MPPT sample pulse. |
| 4 | SW | output | Switch pin delivering power from IN to BAT through the step-down regulator; connect an inductor from SW to CHGSNS. |
| 5 | GND | power_in | Ground pin; connect to the Exposed Pad, which must be soldered to PCB GND. |
| 6 | MPPT | input | Input voltage regulation programming pin; connect a resistive divider from VIN to MPPT to GND, or tie to INTVCC or IN through at least 10k if unused, keeping parasitic capacitance minimal. |
| 7 | FREQ | input | Switching frequency select: INTVCC for 1.5MHz or GND for 750kHz; do not float. |
| 8 | CHGSNS | passive | Battery charge current sense pin, connected through the internal 0.3Ω sense resistor to BAT; connect the inductor from SW to this pin. |
| 9 | BAT | bidirectional | Battery output pin that delivers charge current through the internal sense resistor and sources ILOWBAT for preconditioning; decouple with a low-ESR 22µF ceramic capacitor to GND. |
| 10 | FB | input | Battery voltage feedback pin regulated to 2.4V; set float voltage (3.5V to 18V) with a divider from BAT to FB to FBG, ideally 588k Thevenin resistance to cancel the 25nA bias current. |
| 11 | FBG | passive | Feedback ground pin that presents a low resistance RFBG to GND when sensing the battery and is high impedance in disabled or shutdown modes. |
| 12 | NTC | input | Input to the thermistor monitoring circuit, needing a bias resistor from INTVCC and an NTC thermistor to GND; tie to GND to disable NTC qualified charging. |
| 13 | PROG | passive | Charge current program and monitor pin; connect a 1% resistor of 3.01k (400mA) to 24.3k (50mA) to GND, regulates to 1.227V in constant-current mode with ICHG = hPROG·VPROG/RPROG. |
| 14 | CHRG | output | Open-drain charge status output that is pulled low while charging and high impedance at timer expiry or when charge current falls below 10% of the programmed value; sinks up to 5mA and can be pulled up to IN. |
| 15 | FAULT | output | Open-drain fault status output pulled low for an NTC temperature fault or bad battery fault; sinks up to 5mA and can be pulled up to IN. |
| 16 | RUN | input | Run pin: below VEN (2.45V rising) the device is disabled and below VSD it enters shutdown; use a divider from VIN to program the charging enable voltage and do not float. |
| 17 | GND | power_in | Exposed pad is GND and must be soldered to PCB GND for low electrical and thermal impedance (θJA 54°C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-16-EP(3x3) |
| Category | Power Management ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Input Supply Range | 4.4 | 40 | V | 3 | |||
| Battery Voltage Range (LTC4121) | 0 | 18 | V | LTC4121 (Note 3) | 3 | ||
| DC Supply Current, Switching | IIN | 3.5 | mA | Switching: FREQ = GND | 3 | ||
| DC Supply Current, Standby | IIN | 142 | 260 | µA | Standby Mode: (Note 4) | 3 | |
| DC Supply Current, Sleep | IIN | 60 | 110 | µA | Sleep Mode: LTC4121: VFB = 2.51V (Note 6) | 3 | |
| DC Supply Current, Disabled | IIN | 37 | 80 | µA | Disabled Mode: VSD < VRUN < VEN (Note 4) | 3 | |
| DC Supply Current, Shutdown | IIN | 20 | 40 | µA | Shutdown Mode: (Note 4) | 3 | |
| Differential Undervoltage Lockout | ΔVDUVLO | 20 | 80 | 160 | mV | VIN, VBAT Falling, VIN = 5V (LTC4121) | 3 |
| DUVLO Hysteresis | 115 | mV | VIN, VBAT Rising, VIN = 5V (LTC4121) | 3 | |||
| INTVCC Undervoltage Lockout | UVINTVCC | 4 | 4.15 | 4.26 | V | INTVCC Rising, VIN = INTVCC + 100mV (Note 5) | 3 |
| INTVCC UVLO Hysteresis | 220 | mV | INTVCC Falling | 3 | |||
| BAT Standby Current (LTC4121) | IBAT | 2.5 | 4.5 | µA | Standby Mode (LTC4121) (Notes 4, 8, 9) | 3 | |
| BAT Shutdown Current (LTC4121) | IBAT | 1100 | 2000 | nA | Shutdown Mode (LTC4121) (Notes 4, 8, 9) | 3 | |
| Feedback Pin Bias Current | IFB | 25 | 60 | nA | VFB = 2.5V (Note 6) | 3 | |
| Feedback Ground Leakage Current | IFBG_LEAK | 1 | µA | Shutdown Mode (Note 4) | 3 | ||
| Feedback Ground Return Resistance | RFBG | 1000 | 2000 | Ω | 3 | ||
| Feedback Pin Regulation Voltage | VFB(REG) | 2.393 | 2.4 | 2.407 | V | (Note 6) | 3 |
| Feedback Pin Regulation Voltage (over temperature) | VFB(REG) | 2.37 | 2.418 | V | Over operating junction temperature range (Note 6) | 3 | |
| Battery Charge Current | ICHG | 383 | 402 | 421 | mA | RPROG = 3.01k | 3 |
| Battery Charge Current | ICHG | 45 | 50 | 55 | mA | RPROG = 24.3k | 3 |
| Battery Recharge Threshold | VRCHG | -62 | -49 | -38 | mV | VFB Falling Relative to VFB(REG) (LTC4121) | 3 |
| Ratio of BAT Current to PROG Current | hPROG | 988 | mA/mA | VTRKL < VFB < VFB(REG) | 3 | ||
| PROG Pin Servo Voltage | VPROG | 1.206 | 1.227 | 1.248 | V | 3 | |
| CHGSNS-BAT Sense Resistor | RSNS | 300 | mΩ | IBAT = -100mA | 3 | ||
| Low Battery Linear Charge Current | ILOWBAT | 6 | 9 | 16 | mA | VFB < VTRKL, VBAT = 2.6V (LTC4121) (Note 6) | 4 |
| Low Battery Threshold Hysteresis | 147 | mV | 4 | ||||
| Trickle Charge Threshold | VTRKL | 1.65 | 1.68 | 1.71 | V | VFB Rising (Note 6) | 4 |
| Trickle Charge Threshold Hysteresis | 50 | mV | VFB Falling (Note 6) | 4 | |||
| End of Charge Indication Current Ratio | hC/10 | 0.1 | mA/mA | (Note 7) | 4 | ||
| Safety Timer Termination Period | 1.3 | 2 | 2.8 | hrs | 4 | ||
| Bad Battery Termination Timeout | 19 | 30 | 42 | min | 4 | ||
| Switching Frequency | fOSC | 1 | 1.5 | 2 | MHz | FREQ = INTVCC | 4 |
| Switching Frequency | fOSC | 0.5 | 0.75 | 1 | MHz | FREQ = GND | 4 |
| Minimum Controllable On-Time | tMIN_ON | 120 | ns | 4 | |||
| Maximum Duty Cycle | 94 | % | 4 | ||||
| Top Switch RDSON | RDSON | 0.8 | Ω | ISW = -100mA | 4 | ||
| Bottom Switch RDSON | RDSON | 0.5 | Ω | ISW = 100mA | 4 | ||
| Peak Inductor Current Limit | IPEAK | 585 | 1050 | 1250 | mA | Measured Across RSNS with a 15µH Inductor in Series with RSNS (Note 10) | 4 |
| Switch Pin Current | ISW | 15 | 30 | µA | IN Open-Circuit, VBAT = VSW = 8.4V (LTC4121) | 4 | |
| Status Pin Output Voltage Low | 550 | mV | I = 2mA | 4 | |||
| Status Pin Leakage Current | 0 | 1 | µA | V = 43V, Pin High-Impedance | 4 | ||
| NTC Cold Threshold, Rising | VNTC/VINTVCC | 73 | 74 | 75 | %INTVCC | Fault Rising VNTC Threshold | 4 |
| NTC Cold Threshold, Falling | VNTC/VINTVCC | 72 | %INTVCC | Falling VNTC Threshold | 4 | ||
| NTC Hot Threshold, Falling | VNTC/VINTVCC | 35.5 | 36.5 | 37.5 | %INTVCC | Fault Falling VNTC Threshold | 4 |
| NTC Hot Threshold, Rising | VNTC/VINTVCC | 37.5 | %INTVCC | Rising VNTC Threshold | 4 | ||
| NTC Disable Voltage, Falling | 1 | 2 | 3 | %INTVCC | Falling VNTC Threshold | 4 | |
| NTC Disable Voltage, Rising | 3 | %INTVCC | Rising VNTC Threshold | 4 | |||
| NTC Input Leakage Current | -50 | 50 | nA | VNTC = VINTVCC | 4 | ||
| Enable Threshold | VEN | 2.35 | 2.45 | 2.55 | V | VRUN Rising | 5 |
| Enable Hysteresis | 200 | mV | VRUN Falling | 5 | |||
| Run Pin Input Current | 0.01 | 0.1 | µA | VRUN = 40V | 5 | ||
| Shutdown Threshold | VSD | 0.4 | 1.2 | V | VRUN Falling | 5 | |
| Shutdown Threshold Hysteresis | 220 | mV | 5 | ||||
| FREQ Pin Input Low | 0.4 | V | 5 | ||||
| FREQ Pin Input High | 3.6 | V | 5 | ||||
| FREQ Pin Input Current | -1 | 1 | µA | 0 < VFREQ < VINTVCC | 5 | ||
| MPPT Pin Leakage Current | IMPPT | 15 | 1000 | nA | VMPPT = 4.2V | 5 | |
| MPPT Sample Period | TMP | 28 | s | Period Between Charger Disabled Events | 5 | ||
| MPPT Sample Pulse Width | PWMP | 36 | ms | Charger Disabled Pulse Width | 5 | ||
| Internal Divider Gain | KF | 0.098 | 0.1 | 0.102 | V/V | Internal DAC Voltage as a Ratio to VIN | 5 |
| MPPT Error Amp Gain Offset | VMP(OS) | -100 | -45 | 10 | mV | VMPPT, VDAC, IBAT = 50%• ICHG | 5 |
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | (Note 2) | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| IN, RUN, CHRG, FAULT, MPPT Voltage | -0.3 | 43 | V | 2 | |||
| CHGSNS, BAT, FB, FBG Voltage | -0.3 | 18 | V | 2 | |||
| FREQ, NTC, PROG, INTVCC Voltage | -0.3 | 6 | V | 2 | |||
| ICHGSNS, IBAT | -600 | 600 | mA | 2 | |||
| Junction-to-Ambient Thermal Resistance | θJA | 54 | °C/W | Exposed pad soldered to PCB | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | to the IN pin with the shortest copper traces possible. | 22 |
CAD (KiCad official)
- Symbol:
LTC4121EUD#TRPBF - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
ltc4121eud-trpbf-etched.step/ltc4121eud-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc4121eud-trpbf.step/ltc4121eud-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (30 pp, sha256
637cc566763ce54c, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).