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LTC4040EUFD#TRPBF

Analog Devices · Battery Management · VQFN-24-EP(4x5)

LTC4040EUFD#TRPBF from Analog Devices, in a VQFN-24-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSYS power_out System voltage output that powers the external load from the input supply or the backup battery and charges the battery when input power is available; bypass with a low-ESR ceramic capacitor of at least 100µF to GND.
2 PROG passive Charge current program pin where an external resistor to ground sets full-scale charge current; it servos to 0.8V at full scale, with BAT-to-PROG current ratio internally set to 2500.
3 CLPROG output VSYS current monitor output whose voltage equals 32 times the VIN-to-CLN differential, and charge current is reduced when it reaches 0.8V.
4 CHGOFF input Battery charger disable input: tie to GND to enable the charger or to a voltage above 1.2V to disable it, and do not leave it unconnected.
5 BSTOFF input Backup boost converter disable input: tie to GND to enable backup or to a voltage above 1.2V to disable it, and do not leave it unconnected.
6 VIN power_in Input supply pin that can be driven directly when OVP is not used, otherwise an external N-channel FET is connected between the supply output VPWR and this pin.
7 CLN input Negative terminal of the external input current-limit sense resistor between VIN and CLN, which regulates the sense drop to 25mV and does not limit system current if the drop exceeds 25mV.
8 CHRG output Open-drain charge status output, typically pulled up to a reference voltage, that is pulled low during charging until charge current falls below C/8.
9 FAULT output Open-drain fault status output, typically pulled up to a reference voltage, that is pulled low on a temperature fault or bad-battery fault during charging.
10 RSTFB input High-impedance input to the reset comparator with a 0.74V falling threshold and 20mV hysteresis, using an external divider between VSYS, RSTFB and GND.
11 RST output Open-drain reset output pulled to ground whenever RSTFB falls below 0.74V and becoming high impedance 232ms after RSTFB recovers.
12 F2 input Logic input selecting battery chemistry, where logic high selects Li-Ion and logic low selects LiFePO4, and it must not be left unconnected.
13 F1 input Logic input selecting one of four charge voltage settings for the chosen chemistry, and it must not be left unconnected.
14 F0 input Logic input selecting one of four charge voltage settings for the chosen chemistry, and it must not be left unconnected.
15 IGATE output Gate drive from an internal charge pump for the external N-channel pass FETs, where the first FET (VPWR to VIN) is part of the optional OVP and the second FET (VIN to VSYS) is mandatory for backup disconnect.
16 OVSNS input Overvoltage protection sense input that connects through a 6.2k resistor to the input connector and FET drain if OVP is used, or is shorted to VIN if not; IGATE is pulled to GND when it exceeds about 6V.
17 NTC passive Thermistor monitoring input that uses a low-drift bias resistor from VIN and a thermistor to GND to pause charging when the battery is too hot or too cold, and should be grounded if NTC is not used.
18 BSTFB input Feedback input for the backup boost regulator that servos to 0.8V during steady-state backup operation.
19 PFI input High-impedance power-fail comparator input with a 1.19V falling threshold and 30mV hysteresis that sets the input voltage below which boost backup starts.
20 PFO output Open-drain power-fail status output that is pulled to ground when PFI is below its falling threshold and becomes high impedance once PFI rises above the rising threshold.
21 SW passive Switch node for the buck charger and boost backup converter, requiring a 1µH to 2.2µH inductor connected from SW to BAT.
22 SW passive Switch node for the buck charger and boost backup converter, requiring a 1µH to 2.2µH inductor connected from SW to BAT.
23 BAT bidirectional Single-cell Li-Ion or LiFePO4 battery connection that supplies VSYS through the boost converter in backup and is charged from VSYS through the buck charger; bypass with a low-ESR ceramic capacitor of at least 10µF to GND.
24 VSYS power_out System voltage output that powers the external load from the input supply or the backup battery and charges the battery when input power is available; bypass with a low-ESR ceramic capacitor of at least 100µF to GND.
25 GND power_in Exposed pad that must be soldered to the PCB to provide a low electrical and thermal impedance connection to ground.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package VQFN-24-EP(4x5)
Category Power Management (PMIC)
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Input Voltage Range VIN 3.5 5.5 V 3
VBAT Battery Voltage Range (Backup Boost Input) VBAT 2.7 5 V 3
BAT Quiescent Current, Normal Mode IBATQ 45 70 µA Normal Mode (VPFI = 2V), Battery Charger Timed Out 3
BAT Quiescent Current, Shutdown IBATQ 1.5 3 µA Shutdown (BSTOFF = CHGOFF = 1) 3
VIN Quiescent Current, Shutdown IINQ 3.5 7 µA Shutdown (BSTOFF = CHGOFF=1) 3
BAT Regulated Output Voltage for LiFePO4 Option VCHG 3.42 3.45 3.48 V F2 = 0, F1 = 0, F0 = 0 3
BAT Regulated Output Voltage for LiFePO4 Option VCHG 3.47 3.5 3.53 V F2 = 0, F1 = 0, F0 = 1 3
BAT Regulated Output Voltage for LiFePO4 Option VCHG 3.52 3.55 3.58 V F2 = 0, F1 = 1, F0 = 0 3
BAT Regulated Output Voltage for LiFePO4 Option VCHG 3.57 3.6 3.63 V F2 = 0, F1 = 1, F0 = 1 3
BAT Regulated Output Voltage for Li-Ion Option VCHG 3.92 3.95 3.98 V F2 = 1, F1 = 0, F0 = 0 3
BAT Regulated Output Voltage for Li-Ion Option VCHG 3.97 4 4.03 V F2 = 1, F1 = 0, F0 = 1 3
BAT Regulated Output Voltage for Li-Ion Option VCHG 4.02 4.05 4.08 V F2 = 1, F1 = 1, F0 = 0 3
BAT Regulated Output Voltage for Li-Ion Option VCHG 4.07 4.1 4.13 V F2 = 1, F1 = 1, F0 = 1 3
Regulated Battery Charge Current ICHG 950 1000 1050 mA RPROG = 2k 3
VSYS-to-VBAT Differential Undervoltage Lockout Threshold (Falling) 40 50 60 mV 3
VSYS-to-BAT Differential Undervoltage Lockout Threshold (Rising) 125 145 165 mV 3
Input Current Limit Threshold Voltage VIN, VCLN 23.5 25 26.5 mV 3
Recharge Battery Threshold Voltage (relative to VCHG) VRECHG 94.2 95 95.8 % F2 = 0 and F1 = 1 3
Recharge Battery Threshold Voltage (relative to VCHG) VRECHG 96.7 97.5 98.3 % All other cases 3
Safety Timer Termination Period tTERMINATE 3.7 4.25 5 Hours Timer starts when VBAT = VCHG; F2 = 1 (Li-Ion) 3
Safety Timer Termination Period tTERMINATE 1.85 2.13 2.5 Hours Timer starts when VBAT = VCHG; F2 = 0 (LiFePO4) 3
Low Battery Threshold Voltage for Trickle Charge VLOWBAT 2.75 2.85 2.95 V VBAT Rising 3
Bad-Battery Termination Time tBADBAT 0.47 0.54 0.64 Hours VBAT < (VLOWBAT − ΔVLOWBAT) 3
End-of-Charge Indication PROG Pin Average Voltage VC/8 90 100 110 mV PROG Pin Average Voltage 3
Step-Down (Buck) Converter Switching Frequency fOSC(BUCK) 1.96 2.25 2.65 MHz Normal Mode (VPFI > 1.21V) 3
PMOS Switch Current Limit ILIM(BUCK) 3 4.3 A 3
NTC Cold Temperature Fault Threshold Voltage (Rising) VCOLD 75 76.5 78 %VIN Rising Voltage Threshold 4
NTC Hot Temperature Fault Threshold Voltage (Falling) VHOT 33.4 34.9 36.4 %VIN Falling Voltage Threshold 4
NTC Disable Threshold Voltage (Falling) VDIS 0.7 1.7 2.7 %VIN Falling Threshold 4
NTC Leakage Current INTC -20 20 nA 4
BSTFB Reference Voltage VBSTFB 0.78 0.8 0.82 V 4
BSTFB Input Bias Current IBSTFB -20 20 nA 4
Step-up (Boost) Converter Output Voltage Range VSYS 3.5 5 V 4
Step-Up Converter Switching Frequency fOSCBST 0.98 1.125 1.33 MHz Backup Mode (VPFI < 1.17V) 4
NMOS Switch Current Limit ILIMBST 5.5 6.5 7.5 A 4
VSYS Overvoltage Shutdown Threshold VOVSD 5.3 5.5 5.7 V VSYS Rising 4
BAT Pin Undervoltage Lockout VUVLO 2.45 2.6 V VBAT Falling 4
Maximum Boost Duty Cycle DMAX 88 93 % 4
RSTFB Threshold (Falling) 0.72 0.74 0.76 V 4
RSTFB Pin Leakage Current VRSTFB -50 50 nA VRSTFB = 0.9V 4
PFI Input Threshold (Falling Edge) 1.17 1.19 1.21 V Initiates Backup Mode 4
PFI Pin Leakage Current -100 100 nA VPFI = 1.3V 4
Logic Low Input Leakage IIL -1 1 µA 4
Logic High Input Leakage IIH -1 1 µA 4
Overvoltage Protection Threshold (Rising) VOV(CUTOFF) 6.1 6.4 6.7 V Rising Threshold, ROVSNS = 6.2k 5
IGATE Voltage Under Load VOVGT(LOAD) 8 8.6 V 5V Through 6.2k Into OVSNS, IIGATE = 1µA 5
Operating Junction Temperature Range TJ -40 125 °C Note 3 2
Storage Temperature Range TSTG -65 125 °C 2
VIN (Transient) VIN -0.3 7 V t < 1ms, Duty Cycle < 1% 2
VIN (Steady State), BAT, CLN, VSYS, BSTFB, NTC, OVSNS, CHRG, PFO, RST, FAULT -0.3 6 V 2
F0, F1, F2, BSTOFF, RSTFB, PFI, CHGOFF -0.3 V Upper limit printed as Max (VIN, VBAT, VSYS) + 0.3V; not a fixed number 2
IOVSNS IOVSNS -10 10 mA 2
ICHRG, IPFO, IRST, IFAULT 10 mA 2
IPROG, ICLPROG 1.1 mA 2
Thermal Resistance, Junction to Ambient θJA 43 °C/W 2
Maximum Junction Temperature TJMAX 125 °C 2

CAD (KiCad official)

  • Symbol: LTC4040EUFD#TRPBF
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm
  • 3D model: VQFN-24-EP(4x5) (KiCad packages3D, STEP)
  • 3D model files: ltc4040eufd-trpbf-etched.step / ltc4040eufd-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc4040eufd-trpbf.step / ltc4040eufd-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 957228362ca0845d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF