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LTC3890EUH#TRPBF

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Analog Devices DC-DC Converters, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC3890EUH#TRPBF

Analog Devices · DC-DC Converters · QFN-32-EP(5x5)

LTC3890EUH#TRPBF from Analog Devices, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SENSE1- input (-) input to the controller 1 differential current comparator; it supplies current to the comparator when greater than INTVCC - 0.5V.
2 FREQ input Frequency control for the internal VCO: tying to GND forces 350kHz, tying to INTVCC forces 535kHz, and a resistor to GND programs 50kHz to 900kHz; an internal 20µA pull-up develops the control voltage, and the absolute maximum is -0.3V to INTVCC.
3 PHASMD input Phase selector control: GND sets TG2 and CLKOUT 180° and 60° out of phase with TG1, INTVCC sets 240° and 120°, and floating sets 180° and 90°.
4 CLKOUT output Output clock for daisy-chaining other controller ICs for additional driver phases, with levels swinging from INTVCC to ground.
5 PLLIN/MODE input External synchronization input to the phase detector and light-load mode select: ground selects Burst Mode operation, INTVCC forces continuous operation, and a voltage above 1.2V and below INTVCC - 1.3V selects pulse-skipping.
6 SGND power_in Small-signal ground common to both controllers, which must be routed separately from high-current grounds to the negative terminals of the CIN capacitors.
7 RUN1 input Digital run control for controller 1: forcing below 1.16V shuts down controller 1, and forcing both RUN1 and RUN2 below 0.7V shuts down the whole LTC3890 (about 14µA quiescent current); absolute maximum is 8V.
8 RUN2 input Digital run control for controller 2: forcing below 1.20V shuts down controller 2; absolute maximum is 8V.
9 SENSE2- input (-) input to the controller 2 differential current comparator; it supplies current to the comparator when greater than INTVCC - 0.5V.
10 SENSE2+ input (+) input to the controller 2 differential current comparator, normally connected to DCR sensing networks or current sense resistors; absolute maximum for the SENSE pins is 28V.
11 VFB2 input Remotely sensed feedback input for controller 2 from an external resistive divider across the output, regulated to 0.8V; absolute maximum is 6V.
12 ITH2 passive Error amplifier output and switching regulator compensation point for controller 2, where the current comparator trip point rises with this voltage; absolute maximum is 6V.
13 TRACK/SS2 passive External tracking and soft-start input for controller 2, which regulates VFB2 to the lower of 0.8V or this pin voltage; it has a 1µA internal pull-up and a capacitor to ground sets the ramp time.
14 PGOOD2 output Open-drain power good output for controller 2, pulled to ground when VFB2 is not within ±10% of its set point; absolute maximum is 6V.
15 TG2 output High-current gate drive for the top N-channel MOSFET of controller 2, a floating driver with a swing of INTVCC - 0.5V superimposed on SW2.
16 SW2 output Switch node connection for controller 2 to its inductor.
17 BOOST2 power_out Bootstrapped supply for the controller 2 topside floating driver, with a capacitor between BOOST2 and SW2 and a Schottky diode from BOOST2 to INTVCC; the swing is from INTVCC to VIN + INTVCC.
18 BG2 output High-current gate drive for the bottom synchronous N-channel MOSFET of controller 2, swinging from ground to INTVCC.
19 INTVCC power_out Output of the internal linear LDO that powers the driver and control circuits; it must be decoupled to power ground with at least 4.7µF of ceramic or low-ESR capacitance and must not be used for any other purpose.
20 EXTVCC power_in External power input to the internal LDO feeding INTVCC, which takes over from the VIN-powered LDO when EXTVCC exceeds 4.7V; do not float it or exceed 14V.
21 PGND power_in Driver power ground, connected to the sources of the bottom synchronous N-channel MOSFETs and the negative terminal of CIN.
22 VIN power_in Main supply pin, operating from 4V to 60V (65V absolute maximum), with a bypass capacitor tied between this pin and signal ground.
23 BG1 output High-current gate drive for the bottom synchronous N-channel MOSFET of controller 1, swinging from ground to INTVCC.
24 BOOST1 power_out Bootstrapped supply for the controller 1 topside floating driver, with a capacitor between BOOST1 and SW1 and a Schottky diode from BOOST1 to INTVCC; the swing is from INTVCC to VIN + INTVCC.
25 SW1 output Switch node connection for controller 1 to its inductor.
26 TG1 output High-current gate drive for the top N-channel MOSFET of controller 1, a floating driver with a swing of INTVCC - 0.5V superimposed on SW1.
27 PGOOD1 output Open-drain power good output for controller 1, pulled to ground when VFB1 is not within ±10% of its set point; absolute maximum is 6V.
28 ILIM input Current comparator sense voltage range select: tying to SGND, floating, or tying to INTVCC sets the maximum current sense threshold to one of three levels for both comparators.
29 TRACK/SS1 passive External tracking and soft-start input for controller 1, which regulates VFB1 to the lower of 0.8V or this pin voltage; it has a 1µA internal pull-up and a capacitor to ground sets the ramp time.
30 ITH1 passive Error amplifier output and switching regulator compensation point for controller 1, where the current comparator trip point rises with this voltage; absolute maximum is 6V.
31 VFB1 input Remotely sensed feedback input for controller 1 from an external resistive divider across the output, regulated to 0.8V; absolute maximum is 6V.
32 SENSE1+ input (+) input to the controller 1 differential current comparator, normally connected to DCR sensing networks or current sense resistors; absolute maximum for the SENSE pins is 28V.
33 SGND power_in Exposed pad, internally SGND, which must be soldered to the PCB for rated thermal performance (θJA = 34°C/W, TJMAX = 150°C).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package QFN-32-EP(5x5)
Category Power Management (PMIC)
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Supply Voltage (VIN) absolute maximum VIN -0.3 65 V 2
Topside Driver Voltage BOOST1, BOOST2 -0.3 71 V 2
Switch Voltage SW1, SW2 -5 65 V 2
Topside Driver Voltage (boost to switch) (BOOST1-SW1), (BOOST2-SW2) -0.3 6 V 2
Run Pin Voltage RUN1, RUN2 -0.3 8 V 2
Maximum Current Sourced into Pin 100 µA Source > 8V 2
SENSE+ / SENSE- Voltages SENSE1+, SENSE2+, SENSE1-, SENSE2- -0.3 28 V 2
PLLIN/MODE, INTVCC Voltages PLLIN/MODE, INTVCC -0.3 6 V 2
EXTVCC Voltage EXTVCC -0.3 14 V 2
ITH / VFB Voltages ITH1, ITH2, VFB1, VFB2 -0.3 6 V 2
PGOOD Voltages PGOOD1, PGOOD2 -0.3 6 V 2
TRACK/SS Voltages TRACK/SS1, TRACK/SS2 -0.3 6 V 2
Storage Temperature Range -65 150 °C 2
Operating Junction Temperature Range (LTC3890E) TJ -40 125 °C LTC3890E, LTC3890I 2
Thermal Resistance, Junction to Ambient θJA 34 °C/W 2
Input Supply Operating Voltage Range VIN 4 60 V 3
Regulated Feedback Voltage (all grades) VFB1,2 0.792 0.8 0.808 V ITH1,2 Voltage = 1.2V; -40°C to 85°C, All Grades 3
Regulated Feedback Voltage (E/I, over operating junction temperature range) VFB1,2 0.788 0.8 0.812 V ITH1,2 Voltage = 1.2V; LTC3890E, LTC3890I; over operating junction temperature range 3
Feedback Current IFB1,2 -50 50 nA 3
Reference Voltage Line Regulation VREFLNREG 0.002 0.02 %/V VIN = 4.5V to 60V 3
Output Voltage Load Regulation (ΔITH 1.2V to 0.7V) VLOADREG 0.01 0.1 % Measured in Servo Loop, ΔITH Voltage = 1.2V to 0.7V 3
Output Voltage Load Regulation (ΔITH 1.2V to 2V) VLOADREG -0.01 -0.1 % Measured in Servo Loop, ΔITH Voltage = 1.2V to 2V 3
Input DC Supply Current, Pulse-Skipping or Forced Continuous (one channel on) IQ 1.3 mA RUN1 = 5V and RUN2 = 0V, VFB1 = 0.83V or RUN1 = 0V and RUN2 = 5V, VFB2 = 0.83V 3
Input DC Supply Current, Pulse-Skipping or Forced Continuous (both channels on) IQ 2 mA RUN1,2 = 5V, VFB1,2 = 0.83V (No Load) 3
Input DC Supply Current, Sleep Mode (one channel on) IQ 50 75 µA RUN1 = 5V and RUN2 = 0V, VFB1 = 0.83V (No Load) or RUN1 = 0V and RUN2 = 5V, VFB2 = 0.83V (No Load) 3
Input DC Supply Current, Sleep Mode (both channels on) IQ 60 100 µA RUN1,2 = 5V, VFB1,2 = 0.83V (No Load) 3
Input DC Supply Current, Shutdown IQ 14 25 µA RUN1,2 = 0V 3
Feedback Overvoltage Protection 7 10 13 % Measured at VFB1,2, Relative to Regulated VFB1,2 3
SENSE+ Pin Current ISENSE+ -1 1 µA Each Channel 3
SENSE- Pin Current (VSENSE- < INTVCC, 0.5V) ISENSE- -1 1 µA VSENSE- < INTVCC, 0.5V 3
Maximum TG1,2 Duty Factor in Dropout 98 99 % 3
Soft-Start Charge Current ITRACK/SS1,2 0.7 1 1.4 µA VTRACK/SS1,2 = 0V 3
RUN1 Pin On Threshold VRUN1 1.15 1.21 1.27 V VRUN1 Rising 3
RUN2 Pin On Threshold VRUN2 1.2 1.25 1.3 V VRUN2 Rising 3
Maximum Current Sense Threshold (ILIM = GND) VSENSE(MAX) 22 30 36 mV VFB1,2 = 0.7V, VSENSE1-,2- = 3.3V, ILIM = 0 3
Maximum Current Sense Threshold (ILIM = INTVCC) VSENSE(MAX) 43 50 57 mV VFB1,2 = 0.7V, VSENSE1-,2- = 3.3V, ILIM = INTVCC 3
Maximum Current Sense Threshold (ILIM = FLOAT) VSENSE(MAX) 64 75 85 mV VFB1,2 = 0.7V, VSENSE1-,2- = 3.3V, ILIM = FLOAT 3
INTVCC Internal VCC Voltage (VIN LDO) VINTVCCVIN 4.85 5.1 5.35 V 6V < VIN < 60V, VEXTVCC = 0V 4
INTVCC Internal VCC Voltage (EXTVCC LDO) VINTVCCEXT 4.85 5.1 5.35 V 6V < VEXTVCC < 13V 4
INTVCC Load Regulation (VIN LDO) VLDOVIN 0.7 1.1 % ICC = 0mA to 50mA, VEXTVCC = 0V 4
INTVCC Load Regulation (EXTVCC LDO) VLDOEXT 0.6 1.1 % ICC = 0mA to 50mA, VEXTVCC = 8.5V 4
EXTVCC Switchover Voltage VEXTVCC 4.5 4.7 4.9 V EXTVCC Ramping Positive 4
Programmable Frequency (RFREQ = 65k) f65kΩ 375 440 505 kHz RFREQ = 65k, PLLIN/MODE = DC Voltage 4
Low Fixed Frequency fLOW 320 350 380 kHz VFREQ = 0V, PLLIN/MODE = DC Voltage 4
High Fixed Frequency fHIGH 485 535 585 kHz VFREQ = INTVCC, PLLIN/MODE = DC Voltage 4
Synchronizable Frequency fSYNC 75 850 kHz PLLIN/MODE = External Clock; over operating junction temperature range 4
PGOOD Voltage Low VPGL 0.2 0.4 V IPGOOD = 2mA 4
PGOOD Leakage Current IPGOOD -1 1 µA VPGOOD = 5V 4
PGOOD Trip Level (VFB ramping negative) VPG -13 -10 -7 % VFB with respect to set regulated voltage, VFB ramping negative 4
PGOOD Trip Level (VFB ramping positive) VPG 7 10 13 % VFB with respect to set regulated voltage, VFB ramping positive 4

CAD (KiCad official)

  • Symbol: LTC3890EUH#TRPBF
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ltc3890euh-trpbf-etched.step / ltc3890euh-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc3890euh-trpbf.step / ltc3890euh-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (40 pp, sha256 9b8b6319a8785ee5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF