component
LTC3622EDE-2#PBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, DFN-14-EP(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLTC3622EDE-2#PBF
Analog Devices · DC-DC Converters · DFN-14-EP(3x4)
LTC3622EDE-2#PBF from Analog Devices, in a DFN-14-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN1 | power_in | Input voltage of the channel 1 step-down regulator; this input also powers the INTVCC LDO. |
| 2 | PGOOD1 | output | Open-drain power good indicator for channel 1. |
| 3 | MODE/SYNC | input | Selects Burst Mode operation when tied to INTVCC (400mA peak current clamp) or pulse-skipping operation when tied to GND, and synchronizes the switch clock when driven by an external clock (which also forces pulse-skipping mode). |
| 4 | PHASE | input | Phase select: tie to GND for 0° phase shift between channel 1 and channel 2 SW rising edges, or tie to INTVCC for 180° phase shift. |
| 5 | PGOOD2 | output | Open-drain power good indicator for channel 2. |
| 6 | ILIM | input | Current limit select: tying to GND sets full current limit for both channels, tying to INTVCC drops it by a factor of 2 for both, and biasing to 1V sets channel 1 to full current and channel 2 to half. |
| 7 | VIN2 | power_in | Input voltage of the channel 2 step-down regulator, which may be a different voltage than VIN1. |
| 8 | SW2 | output | Switch node connection to the inductor of the channel 2 step-down regulator. |
| 9 | RUN2 | input | Logic-controlled RUN input for channel 2; logic high activates the regulator, and the pin must not be left floating. |
| 10 | FB2 | input | Feedback input to the channel 2 error amplifier; for adjustable outputs VOUT = 0.6V × [1 + (R2/R1)] up to VIN, and for fixed-VOUT options the FB pin connects directly to VOUT. |
| 11 | INTVCC | power_out | Low dropout regulator output that must be bypassed with a low ESR capacitor of at least 1µF to ground. |
| 12 | FB1 | input | Feedback input to the channel 1 error amplifier; for adjustable outputs VOUT = 0.6V × [1 + (R2/R1)] up to VIN, and for fixed-VOUT options the FB pin connects directly to VOUT. |
| 13 | RUN1 | input | Logic-controlled RUN input for channel 1; logic high activates the regulator, and the pin must not be left floating. |
| 14 | SW1 | output | Switch node connection to the inductor of the channel 1 step-down regulator. |
| 15 | GND | power_in | Ground for power and signal; the exposed pad must be soldered to PCB ground for rated electrical and thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-14-EP(3x4) |
| Category | Power Management ICs |
| Pins | 15 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN1, VIN2 Operating Voltage | VIN1, VIN2 | 2.7 | 17 | V | 4 | ||
| VOUT Operating Voltage | VOUT | 0.6 | V | Printed upper limit is VIN | 4 | ||
| Input Quiescent Current, Active Mode | IQ | 3 | 5 | mA | Active Mode, VRUN1 = VRUN2 = 2V (Note 4) | 4 | |
| Input Quiescent Current, Burst Mode Operation | IQ | 10 | µA | Burst Mode Operation, VRUN1 = VRUN2 = 2V, MODE/SYNC = 3V, No Load | 4 | ||
| Input Quiescent Current, Shutdown Mode | IQ | 0.1 | 1 | µA | Shutdown Mode; VRUN1 = VRUN2 = 0V | 4 | |
| Regulated Feedback Voltage | VFB | 0.594 | 0.6 | 0.606 | V | LTC3622/LTC3622-2 | 4 |
| Regulated Feedback Voltage over operating junction temperature range | VFB | 0.591 | 0.6 | 0.609 | V | LTC3622/LTC3622-2, l (over operating junction temperature range) | 4 |
| FB Input Current | IFB | 10 | nA | LTC3622/LTC3622-2 | 4 | ||
| Reference Voltage Line Regulation | 0.01 | 0.015 | %/V | VIN = 2.7V to 17V (Note 5) | 4 | ||
| Output Voltage Load Regulation | 0.1 | % | Note 5 | 4 | |||
| NMOS Switch Leakage | 0.1 | 1 | µA | 4 | |||
| PMOS Switch Leakage | 0.1 | 1 | µA | 4 | |||
| NMOS On-Resistance | RDS(ON) | 0.15 | Ω | VIN = 5V | 4 | ||
| PMOS On-Resistance | RDS(ON) | 0.37 | Ω | VIN = 5V | 4 | ||
| Maximum Duty Cycle | 100 | % | VFB = 0V, l | 4 | |||
| Minimum On-Time | tON(MIN) | 75 | ns | VFB = 0.7V, VIN1 = VIN2 = 5 | 4 | ||
| RUN Input High | VRUN | 1 | V | 4 | |||
| RUN Input Low | VRUN | 0.35 | V | 4 | |||
| RUN Input Current | -20 | 0.1 | 20 | nA | VRUN = 12V | 4 | |
| VMODE Burst Mode Operation | VMODE | 0.15 | V | 4 | |||
| PHASE Input Threshold Input High | 2 | V | 4 | ||||
| PHASE Input Threshold Input Low | 0.4 | V | 4 | ||||
| ILIM Input Threshold Input Low | 0.1 | V | 4 | ||||
| ILIM Peak Current Limit | 1.6 | 1.8 | 2 | A | VIN > 5V, VILIM = 0.1V (Both Channels) | 4 | |
| ILIM Peak Current Limit | 0.8 | 1 | 1.2 | A | VIN > 5V, VILIM = INTVCC, 0.1V (Both Channels) | 4 | |
| VINTVCC Undervoltage Lockout | 2.3 | 2.5 | 2.65 | V | VIN Ramping Up | 4 | |
| VINTVCC Undervoltage Lockout Hysteresis | 160 | mV | 4 | ||||
| VIN Overvoltage Lockout Rising | 18 | 19 | 20 | V | l (over operating junction temperature range) | 4 | |
| VIN Overvoltage Lockout Hysteresis | 300 | mV | 4 | ||||
| Oscillator Frequency | fOSC | 1.8 | 2.25 | 2.6 | MHz | LTC3622-2/LTC3622-23/5, -40°C ≤ TA ≤ 150°C, l | 5 |
| External CLK Amplitude | 0.4 | V | Printed upper limit is VINTVCC, 0.3 | 5 | |||
| SYNC Capture Range | 50 | 150 | % | % of Programmed Frequency | 5 | ||
| INTVCC Voltage | VINTVCC | 3.3 | 3.6 | 3.9 | V | 5 | |
| Power Good Range | -11 | -7.5 | % | VIN > 4V | 5 | ||
| Power Good Resistance | RPGOOD | 275 | 350 | Ω | PGOOD RDS(ON) at 2mA | 5 | |
| PGOOD Delay PGOOD Low to High | tPGOOD | 0 | Cycles | 5 | |||
| PGOOD Delay PGOOD High to Low | tPGOOD | 32 | Cycles | 5 | |||
| Phase Shift Between Channel 1 and Channel 2 | 0 | Deg | VPHASE = 0V | 5 | |||
| Phase Shift Between Channel 1 and Channel 2 | 180 | Deg | VPHASE = INTVCC, VMODE/SYNC = 0V | 5 | |||
| VIN1, VIN2 Absolute Maximum Voltage | VIN1, VIN2 | -0.3 | 17 | V | 3 | ||
| RUN1, RUN2 Absolute Maximum Voltage | RUN1, RUN2 | -0.3 | V | Printed upper limit is VIN1 | 3 | ||
| MODE/SYNC, FB1, FB2 Absolute Maximum Voltage | MODE/SYNC, FB1, FB2 | -0.3 | 6 | V | 3 | ||
| PGOOD1, PGOOD2, ILIM, PHASE Absolute Maximum Voltage | PGOOD1, PGOOD2, ILIM, PHASE | -0.3 | 6 | V | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 3 | |||
| Operating Junction Temperature Range (E grade) | TJ | -40 | 125 | °C | LTC3622E | 3 | |
| Thermal Resistance, Junction to Ambient | θJA | 40 | °C/W | DE package (14-lead 4mm × 3mm plastic DFN) | 3 | ||
| Thermal Resistance, Junction to Case | θJC | 4.4 | °C/W | DE package (14-lead 4mm × 3mm plastic DFN) | 3 |
CAD (KiCad official)
- Symbol:
LTC3622EDE-2#PBF - Footprint:
Package_DFN_QFN:DFN-14-1EP_3x4mm_P0.5mm_EP1.7x3.3mm - 3D model: DFN-14-EP(3x4) (KiCad packages3D, STEP)
- 3D model files:
ltc3622ede-2-pbf-etched.step/ltc3622ede-2-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc3622ede-2-pbf.step/ltc3622ede-2-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
5a5216005c5220a2, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).