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Ray Publish 0.1.0 3c42889 9d ago

LTC3621EMS8E-2#PBF

Analog Devices · DC-DC Converters · MSOP-8-EP

LTC3621EMS8E-2#PBF from Analog Devices, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connection to the inductor of the step-down regulator.
2 VIN power_in Input voltage of the step-down regulator, operating range 2.7V to 17V.
3 RUN input Logic-controlled RUN input where logic high activates the step-down regulator; it must not be left floating, and RUN voltage is limited to VIN to -0.3V.
4 PGOOD output VOUT within regulation indicator for the MSOP package only; PGOOD voltages are limited to 6V to -0.3V.
5 FB input Feedback input to the error amplifier, where VOUT = 0.6V • [1 + (R2/R1)] sets the output from 0.6V to VIN via a resistor divider tap.
6 INTVCC power_out Low dropout regulator output that must be bypassed with at least 1µF to ground.
7 MODE/SYNC input Selects Burst Mode operation with a 400mA peak current clamp when tied to INTVCC, pulse-skipping when tied to GND, or forced continuous mode when tied between 1V and VINTVCC - 1.2V; an external clock applied here syncs the switching frequency and forces continuous mode.
8 SGND power_in Signal ground for the MSOP package only.
9 GND power_in Exposed pad that serves as the ground backplane for power and signal ground and must be soldered to PCB ground.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-8-EP
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Operating Voltage VIN 2.7 17 V 4
VOUT Operating Voltage VOUT 0.6 V 4
Regulated Feedback Voltage (LTC3621/LTC3621-2, first row) VFB 0.594 0.6 0.606 V Over operating junction temperature range (l) 4
Regulated Feedback Voltage (LTC3621/LTC3621-2, second row) VFB 0.591 0.6 0.609 V Over operating junction temperature range (l) 4
RUN Input High Threshold VRUN 1 V 4
RUN Input Low Threshold VRUN 0.3 V 4
RUN Input Current IRUN 0 20 nA VRUN = 12V 4
MODE/SYNC Input Current IMODE/SYNC 0 20 nA 4
FB Input Current IFB 10 nA LTC3621/LTC3621-2 4
Reference Voltage Line Regulation ΔVLINE(REG) 0.01 0.015 %/V VIN = 2.7V to 17V 4
Output Voltage Load Regulation ΔVLOAD(REG) 0.1 % 4
NMOS Switch Leakage ILSW 0.1 1 µA 4
PMOS Switch Leakage ILSW 0.1 1 µA 4
NMOS On-Resistance (Bottom FET) RDS(ON) 0.15 Ω VIN = 5V 4
PMOS On-Resistance (Top FET) RDS(ON) 0.37 Ω 4
Maximum Duty Cycle DMAX 100 % VFB = 0.5V, VMODE/SYNC = 1.5V 4
Minimum On-Time tON(MIN) 60 ns 4
Pulse-Skipping Mode MODE/SYNC voltage VMODE/SYNC 0.3 V 4
Forced Continuous Mode MODE/SYNC voltage VMODE/SYNC 1 V 4
Internal Soft-Start Time tSS 0.8 ms 4
Peak Current Limit (E/I-Grade) ILIM 1.44 1.6 1.76 A E/I-Grade 4
VINTVCC Undervoltage Lockout VUVLO 2.4 2.6 2.7 V VIN ramping up 4
VINTVCC Undervoltage Lockout Hysteresis VUVLO(HYS) 250 mV 4
VIN Overvoltage Lockout Rising VOVLO 18 19 20 V Over operating junction temperature range (l) 4
VIN Overvoltage Lockout Hysteresis VOVLO(HYS) 300 mV 4
Oscillator Frequency (E/I-Grade, LTC3621-2) fOSC 2.05 2.25 2.45 MHz LTC3621-2/LTC3621-23.3/LTC3621-25, E/I-Grade 5
SYNC Capture Range fSYNC 60 140 % 5
VINTVCC LDO Output Voltage VINTVCC 3.6 V VIN > 4V 5
Power Good Range ΔVPGOOD -7.5 7.5 % 5
Power Good Resistance RPGOOD 275 350 Ω PGOOD RDS(ON) at 500µA 5
PGOOD Delay PGOOD Low to High tPGOOD 0 Cycles PGOOD Low to High 5
PGOOD Delay PGOOD High to Low tPGOOD 32 Cycles PGOOD High to Low 5
PGOOD Leakage Current IPGOOD 100 nA 5
VIN Voltage (absolute maximum) VIN -0.3 17 V 2
RUN Voltage RUN -0.3 V Printed as VIN to -0.3V 2
MODE/SYNC, FB Voltages MODE/SYNC, FB -0.3 6 V 2
PGOOD Voltages PGOOD -0.3 6 V 2
Operating Junction Temperature Range (E grade) TJ -40 125 °C LTC3621E 2
Storage Temperature Range TSTG -65 150 °C 2
Maximum Junction Temperature (MS8E package) TJMAX 150 °C MS8E package 2
Junction-to-Ambient Thermal Resistance (MS8E package) θJA 40 °C/W MS8E package 2
Junction-to-Case Thermal Resistance (MS8E package) θJC 10 °C/W MS8E package 2

CAD (KiCad official)

  • Symbol: LTC3621EMS8E-2#PBF
  • Footprint: Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm
  • 3D model: MSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: ltc3621ems8e-2-pbf-etched.step / ltc3621ems8e-2-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc3621ems8e-2-pbf.step / ltc3621ems8e-2-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 82b884bf58700a7a, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF