component
LTC3607EUD#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| ltc3607eud-trpbf-etched.glb | 16d ago |
| ltc3607eud-trpbf-etched.step | 16d ago |
| ltc3607eud-trpbf-hero.glb | 16d ago |
| ltc3607eud-trpbf-hero.overlay.json | 16d ago |
| ltc3607eud-trpbf.glb | 16d ago |
| ltc3607eud-trpbf.kicad_mod | 16d ago |
| ltc3607eud-trpbf.kicad_sym | 16d ago |
| ltc3607eud-trpbf.lbr | 16d ago |
| ltc3607eud-trpbf.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
LTC3607EUD#TRPBF
Analog Devices · DC-DC Converters · QFN-16-EP(3x3)
LTC3607EUD#TRPBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MODE/SYNC | input | Mode select and oscillator sync: forcing SGND selects pulse-skipping mode, floating or above 1V selects Burst Mode operation, and an external 1MHz to 4MHz clock applied here synchronizes the oscillator and automatically selects pulse-skipping mode. |
| 2 | PGOOD1 | output | Regulator 1 power good, a common-drain logic output pulled to SGND when the channel 1 output is not within ±8.5% of regulation. |
| 3 | SVIN | power_in | Supply for the control circuitry, operating from 4.5V to 15V, and connected to the higher of PVIN1 or PVIN2 (or through diodes to both if unknown). |
| 4 | PGND1 | power_in | Main ground for regulator 1, to be connected to the negative terminals of COUT1 and CIN and externally connected to all other SGND and PGND pins. |
| 5 | SW1 | output | Regulator 1 switch node connected to the inductor, switching between PVIN1 and PGND1. |
| 6 | PVIN1 | power_in | Regulator 1 main power supply input, operating from 4.5V to 15V, which must be closely decoupled to GND. |
| 7 | PVIN2 | power_in | Regulator 2 main power supply input, operating from 4.5V to 15V, which must be closely decoupled to GND. |
| 8 | SW2 | output | Regulator 2 switch node connected to the inductor, switching between PVIN2 and PGND2. |
| 9 | PGND2 | power_in | Main ground for regulator 2, to be connected to the negative terminals of COUT2 and CIN and externally connected to all other SGND and PGND pins. |
| 10 | SGND | power_in | Signal ground that must be externally connected to all other SGND and PGND pins and to ground. |
| 11 | PGOOD2 | output | Regulator 2 power good, a common-drain logic output pulled to SGND when the channel 2 output is not within ±8.5% of regulation. |
| 12 | SGND | power_in | Signal ground that must be externally connected to all other SGND and PGND pins and to ground. |
| 13 | RUN2 | input | Regulator 2 enable: forcing above 3.0V enables the regulator and forcing it to SGND shuts it down, with a 3.3V source or a tie to SVIN usable as the drive. |
| 14 | VFB2 | input | Regulator 2 output feedback from the external resistor divider, with a nominal voltage of 0.6V. |
| 15 | VFB1 | input | Regulator 1 output feedback from the external resistor divider, with a nominal voltage of 0.6V. |
| 16 | RUN1 | input | Regulator 1 enable: forcing above 3V enables the regulator and forcing it to SGND shuts it down, with a 3.3V source or a tie to SVIN usable as the drive. |
| 17 | PGND | power_in | Exposed pad, which is the main ground and must be soldered to PCB ground for electrical contact and rated thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SVIN Operating Voltage Range | 4.5 | 15 | V | 3 | |||
| PVIN Operating Voltage Range | 4.5 | 15 | V | 3 | |||
| VOUT Output Voltage Range | VOUT | 0.6 | V | 3 | |||
| VFB Feedback Voltage | VFB | 0.591 | 0.6 | 0.609 | V | Note 3 | 3 |
| VFB Feedback Voltage | VFB | 0.588 | 0.6 | 0.612 | V | Note 3 | 3 |
| Feedback Pin Input Current | IFB | 30 | nA | 3 | |||
| Reference Voltage Line Regulation | ΔVLINE REG | 0.1 | 0.15 | %/V | VIN = 4.5V to 15V (Note 3) | 3 | |
| Output Voltage Load Regulation | ΔVLOAD REG | 0.5 | % | MODE/SYNC = 0V (Note 3) | 3 | ||
| Input DC Supply Current, Sleep Mode (Both Channels) | IS | 55 | 90 | µA | VFB1 = VFB2 = 0.64V | 3 | |
| Input DC Supply Current, Sleep Mode (Single Channel) | IS | 35 | 60 | µA | VFB(1 or 2) = 0.64V | 3 | |
| Input DC Supply Current, Shutdown | IS | 0.1 | 1 | µA | RUN1 = RUN2 = 0V | 3 | |
| Oscillator Frequency | fOSC | 1.8 | 2.25 | 2.7 | MHz | VFB1, 2 = 0.6V | 3 |
| Synchronization Frequency | fSYNC | 1 | 4 | MHz | 3 | ||
| Peak Switch Current Limit | ILIM | 0.75 | 1 | 1.25 | A | VFB1, 2 = 0.5V, Duty Cycle < 35% | 3 |
| SVIN Undervoltage Lockout Threshold | 3.4 | 4.3 | V | SVIN Rising | 3 | ||
| PGOOD1/2 Overvoltage Threshold | 8.5 | 11 | % | VFB1, 2 Rising | 3 | ||
| PGOOD1/2 Undervoltage Threshold | -11 | -8.5 | % | VFB1, 2 Ramping Down | 3 | ||
| RUN1/2 VIL | VRUN | 0.55 | V | 3 | |||
| RUN1/2 VIH | VRUN | 3 | V | 3 | |||
| RUN1/2 Leakage Current | IRUN | 0.01 | 1 | µA | 3 | ||
| MODE/SYNC VIL | VMODE/SYNC | 0.3 | V | 3 | |||
| MODE/SYNC VIH | VMODE/SYNC | 1 | V | 3 | |||
| PVIN, SVIN Voltages | -0.3 | 15 | V | 2 | |||
| RUN1, RUN2 Voltages | -0.3 | V | Maximum printed as SVIN + 0.3V | 2 | |||
| VFB1, VFB2 Voltages | -0.3 | 3.6 | V | 2 | |||
| MODE/SYNC Voltage | -0.3 | 3.6 | V | 2 | |||
| PGOOD1, PGOOD2 Voltages | -0.3 | 15 | V | 2 | |||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | Notes 2, 7 | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 68 | °C/W | UD (QFN) package | 2 | ||
| Thermal Resistance Junction-to-Case | θJC | 7.5 | °C/W | UD (QFN) package | 2 | ||
| Maximum Junction Temperature | TJMAX | 125 | °C | UD (QFN) package | 2 |
CAD (KiCad official)
- Symbol:
LTC3607EUD#TRPBF - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
ltc3607eud-trpbf-etched.step/ltc3607eud-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc3607eud-trpbf.step/ltc3607eud-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
1b5e69748ab51b82, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).