component
LTC3601EUD#PBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LTC3601EUD#PBF
Analog Devices · DC-DC Converters · QFN-16-EP(3x3)
LTC3601EUD#PBF from Analog Devices, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MODE/SYNC | input | Mode selection and external synchronization input: tie to ground for forced continuous operation, float or tie to INTVCC for Burst Mode operation, and drive with an external clock to synchronize (the part then defaults to forced continuous operation). |
| 2 | PGOOD | output | Open-drain power good output that is pulled to ground when FB is not within 8% (typical) of the 0.6V reference and becomes high impedance once FB returns to within ±5% (typical). |
| 3 | SW | output | Switch node output connected to the SW side of the external inductor, with a normal operating voltage swing from ground to PVIN. |
| 4 | SW | output | Switch node output connected to the SW side of the external inductor, with a normal operating voltage swing from ground to PVIN. |
| 5 | NC | unconnected | Labeled NC in the pin configuration drawing; the datasheet gives no function for this pin. |
| 6 | BOOST | power_out | Boosted floating driver supply: the bootstrap capacitor (+) connects here and (-) to SW, with a normal swing from a diode drop below INTVCC up to PVIN + INTVCC. |
| 7 | INTVCC | power_out | Internal 3.3V regulator output that should be decoupled to PGND with a low-ESR ceramic capacitor of 1µF or more. |
| 8 | VON | input | On-time voltage input that sets the on-time comparator trip point; connect to the regulated output for VOUT ≤ 6V, with a normal pin impedance of 180kΩ. |
| 9 | SGND | power_in | Signal ground that should have a low-noise connection to reference ground; the feedback network, external compensation network and RT resistor connect to this pin. |
| 10 | RT | passive | Oscillator frequency program pin: connect a resistor between 80k and 400k from this pin to SGND to set 800kHz to 4MHz, or tie to INTVCC to default to 2MHz. |
| 11 | FB | input | Output voltage feedback input to the error amplifier, which compares it to the internal 0.6V reference through an external resistor divider. |
| 12 | ITH | passive | Error amplifier output and switching regulator compensation pin; connect to INTVCC to use the default internal compensation. |
| 13 | TRACK | input | Output voltage tracking and soft-start input: forcing below 0.6V overrides the internal reference, and an internal 1.4µA pull-up allows a soft-start capacitor to ground. |
| 14 | RUN | input | Regulator enable pin: a voltage above 1.25V enables the chip and below 1V places it in shutdown, and the pin must not be left floating. |
| 15 | VIN | power_in | Main power supply input for the 4V to 15V operating range, to be closely decoupled to PGND with a low-ESR capacitor of 10µF or more. |
| 16 | VIN | power_in | Main power supply input for the 4V to 15V operating range, to be closely decoupled to PGND with a low-ESR capacitor of 10µF or more. |
| 17 | PGND | power_in | Power ground exposed pad that must be soldered to the PCB to provide low-impedance electrical contact to ground and good thermal contact. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QFN-16-EP(3x3) |
| Category | Power Management ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Supply Range (VIN) | VIN | 4 | 15 | V | 3 | ||
| Input DC Supply Current, Forced Continuous Operation | IQ | 700 | 1000 | µA | MODE = 0V | 3 | |
| Input DC Supply Current, Sleep Current | IQ | 300 | 500 | µA | MODE = INTVCC, VFB > 0.6V | 3 | |
| Input DC Supply Current, Shutdown | IQ | 14 | 25 | µA | RUN = 0V | 3 | |
| Feedback Reference Voltage | VFB | 0.594 | 0.6 | 0.606 | V | 3 | |
| Feedback Pin Input Current | IFB | -30 | 30 | nA | VFB = 0.6V | 3 | |
| Minimum Off-Time | tOFF(MIN) | 40 | 60 | ns | VIN = 6V | 3 | |
| Valley Switch Current Limit | ILIM | 1.7 | 2.2 | 2.8 | A | 3 | |
| Oscillator Frequency | fOSC | 1.4 | 2 | 2.6 | MHz | VRT = INTVCC | 3 |
| Oscillator Frequency | fOSC | 1.7 | 2 | 2.3 | MHz | RRT = 160k | 3 |
| Oscillator Frequency | fOSC | 3.4 | 4 | 4.6 | MHz | RRT = 80k | 3 |
| VIN Overvoltage Lockout Threshold (VIN Rising) | VVIN-OV | 16.8 | 17.5 | 18 | V | VIN Rising | 3 |
| VIN Overvoltage Lockout Threshold (VIN Falling) | VVIN-OV | 15.8 | 16.5 | 17 | V | VIN Falling | 3 |
| INTVCC Voltage | VINTVCC | 3.15 | 3.3 | 3.45 | V | 4V < VIN < 15V | 3 |
| RUN Threshold (RUN Rising) | VRUN | 1.21 | 1.25 | 1.29 | V | RUN Rising | 3 |
| RUN Threshold (RUN Falling) | VRUN | 0.97 | 1 | 1.03 | V | RUN Falling | 3 |
| RUN Leakage Current | IRUN(LKG) | -3 | 0 | 3 | µA | VVIN = 15V | 3 |
| Switch Leakage Current | ISW(LKG) | 0.01 | 1 | µA | VRUN = 0V | 3 | |
| Power Good Filter Time | tPGOOD | 20 | 40 | µs | 3 | ||
| Internal Soft-Start Time | tSS | 400 | 700 | µs | VFB from 10% to 90% Full Scale | 3 | |
| TRACK Pin Voltage | VFB_TRACK | 0.28 | 0.3 | 0.315 | V | TRACK = 0.3V | 3 |
| MODE Threshold Voltage, VIH | VMODE/SYNC VIH | 1 | V | 3 | |||
| MODE Threshold Voltage, VIL | VMODE/SYNC VIL | 0.4 | V | 3 | |||
| SYNC Threshold Voltage, VIH | VIH | 0.95 | V | 3 | |||
| MODE Input Current | IMODE | -1.5 | 1.5 | µA | min: MODE = 0V; max: MODE = INTVCC | 3 | |
| VIN Absolute Maximum | VIN | -0.3 | 16 | V | 2 | ||
| VIN Transient Voltage | VIN | 18 | V | Transient | 2 | ||
| BOOST Absolute Maximum | BOOST | -0.3 | 18.6 | V | 2 | ||
| BOOST-SW Absolute Maximum | BOOST-SW | -0.3 | 3.6 | V | 2 | ||
| INTVCC Absolute Maximum | INTVCC | -0.3 | 3.6 | V | 2 | ||
| PGOOD, VON Absolute Maximum | PGOOD, VON | -0.3 | 16 | V | 2 | ||
| SW Source Current (DC) | SW | 2 | A | DC | 2 | ||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | Notes 2, 3 | 2 | |
| Storage Temperature Range | TSTG | -65 | 125 | °C | 2 | ||
| Junction-to-Ambient Thermal Resistance (QFN) | θJA | 45 | °C/W | QFN package | 2 |
CAD (KiCad official)
- Symbol:
LTC3601EUD#PBF - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
ltc3601eud-pbf-etched.step/ltc3601eud-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc3601eud-pbf.step/ltc3601eud-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
d75d60bef13e484c, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).