# LTC3548EDD#TRPBF

**Analog Devices** · DC-DC Converters · DFN-10-EP(3x3)

LTC3548EDD#TRPBF from Analog Devices, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VFB1 | input | Receives the feedback voltage from the external resistive divider across output 1; the nominal voltage for this pin is 0.6V. |
| 2 | RUN1 | input | Regulator 1 enable: forcing this pin to VIN enables regulator 1 and forcing it to GND shuts it down, and it must be driven and not left floating. |
| 3 | VIN | power_in | Main power supply input with an operating voltage range of 2.5V to 5.5V, which must be closely decoupled to GND. |
| 4 | SW1 | output | Regulator 1 switch node connection to the inductor; this pin swings from VIN to GND. |
| 5 | GND | power_in | Ground pin that is not connected internally and should be connected to PCB ground for optimum shielding. |
| 6 | MODE/SYNC | input | Mode selection and oscillator synchronization: tying it to VIN selects Burst Mode operation, tying it to GND selects pulse-skipping mode, it must not be left floating, and an external oscillator applied here synchronizes the frequency and automatically selects pulse-skipping mode. |
| 7 | SW2 | output | Regulator 2 switch node connection to the inductor; this pin swings from VIN to GND. |
| 8 | POR | output | Power-On Reset common-drain logic output that is pulled to GND when the output falls below -8.5% of regulation and goes high after 117ms when both channels are within regulation. |
| 9 | RUN2 | input | Regulator 2 enable: forcing this pin to VIN enables regulator 2 and forcing it to GND shuts it down, and it must be driven and not left floating. |
| 10 | VFB2 | input | Receives the feedback voltage from the external resistive divider across output 2; the nominal voltage for this pin is 0.6V. |
| 11 | GND | power_in | Exposed pad power ground that must be connected to the (-) terminal of COUT and CIN and to electrical ground on the PCB. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-10-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VIN | 2.5 |  | 5.5 | V |  | 2 |
| Feedback Pin Input Current | IFB |  |  | 30 | nA |  | 2 |
| Feedback Voltage | VFB | 0.588 | 0.6 | 0.612 | V | 0°C ≤ TA ≤ 85°C | 2 |
| Feedback Voltage | VFB | 0.585 | 0.6 | 0.612 | V | -40°C ≤ TA ≤ 85°C | 2 |
| Reference Voltage Line Regulation | ΔVLINEREG |  | 0.3 | 0.5 | %V | VIN = 2.5V to 5.5V (Note 3) | 2 |
| Input DC Supply Current, Active Mode | IS |  | 700 | 950 | μA | VFB1 = VFB2 = 0.5V | 3 |
| Input DC Supply Current, Sleep Mode | IS |  | 40 | 60 | μA | VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V | 3 |
| Input DC Supply Current, Shutdown | IS |  | 0.1 | 1 | μA | RUN = 0V, VIN = 5.5V, MODE/SYNC = 0V | 3 |
| Oscillator Frequency | fOSC | 1.8 | 2.25 | 2.7 | MHz | VFB = 0.6V | 3 |
| Peak Switch Current Limit Channel 1 | ILIM | 0.95 | 1.2 | 1.6 | A | VIN = 3V, VFB = 0.5V, Duty Cycle <35% | 3 |
| Peak Switch Current Limit Channel 2 | ILIM | 0.6 | 0.7 | 0.9 | A | VIN = 3V, VFB = 0.5V, Duty Cycle <35% | 3 |
| Top Switch On-Resistance | RDS(ON) |  | 0.35 | 0.45 | Ω | (Note 6) | 3 |
| Bottom Switch On-Resistance | RDS(ON) |  | 0.3 | 0.45 | Ω | (Note 6) | 3 |
| Switch Leakage Current | ISW(LKG) |  | 0.01 | 1 | μA | VIN = 5V, VRUN = 0V, VFB = 0V | 3 |
| Power-On Reset On-Resistance |  |  | 100 | 200 | Ω |  | 3 |
| RUN Threshold | VRUN | 0.3 | 1 | 1.5 | V |  | 3 |
| RUN Leakage Current | IRUN |  | 0.01 | 1 | μA |  | 3 |
| MODE Mode Threshold Low |  | 0 |  | 0.5 | V |  | 3 |
| Input Voltage (VIN Voltages) | VIN | -0.3 |  | 6 | V |  | 2 |
| VFB1, VFB2 Voltages | VFB1, VFB2 | -0.3 |  |  | V |  | 2 |
| RUN1, RUN2 Voltages | RUN1, RUN2 | -0.3 |  |  | V |  | 2 |
| MODE/SYNC Voltage | MODE/SYNC | -0.3 |  |  | V |  | 2 |
| SW1, SW2 Voltage | SW1, SW2 | -0.3 |  |  | V |  | 2 |
| POR Voltage | POR | -0.3 |  | 6 | V |  | 2 |
| Operating Temperature Range |  | -40 |  | 85 | °C | Note 2 | 2 |
| Junction Temperature |  |  |  | 125 | °C | Note 5 | 2 |
| Storage Temperature Range |  | -65 |  | 125 | °C |  | 2 |
| Junction-to-Ambient Thermal Resistance (DD package) | θJA |  | 45 |  | °C/W | DD package; exposed pad soldered to 4-layer board | 2 |
| Junction-to-Case Thermal Resistance (DD package) | θJC |  | 3 |  | °C/W | DD package | 2 |

## CAD (KiCad official)

- Symbol: `LTC3548EDD#TRPBF`
- Footprint: `Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm`
- 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `ltc3548edd-trpbf-etched.step` / `ltc3548edd-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc3548edd-trpbf.step` / `ltc3548edd-trpbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917159615062016) (16 pp, sha256 `c2c75034252909bc`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ltc3548edd-trpbf-datasheet.pdf)