component
LTC3526LEDC#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, DFN-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLTC3526LEDC#TRPBF
Analog Devices · DC-DC Converters · DFN-6-EP(2x2)
LTC3526LEDC#TRPBF from Analog Devices, in a DFN-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch pin that connects the inductor between SW and VIN; the DC absolute maximum is -0.3V to 6V (pulsed <100ns: -0.3V to 7V), and an internal anti-ringing switch connects SW to VIN when the inductor current reaches zero or SHDN is low. |
| 2 | GND | power_in | Signal and power ground that must have a short direct PCB path to the negative side of the input and output capacitors. |
| 3 | VIN | power_in | Input supply pin with an absolute maximum of -0.3V to 6V, requiring a minimum 1µF ceramic decoupling capacitor to ground; the part starts up from 0.68V typical and operates down to 0.5V after start-up. |
| 4 | SHDN | input | Logic-controlled shutdown input with an internal 4MΩ pull-down, enabled above 0.8V and shut down below 0.3V (quiescent current <1µA when low), with an absolute maximum of -0.3V to 6V. |
| 5 | FB | input | Feedback input to the gm error amplifier, which regulates to the 1.195V reference, with the output set from 1.5V to 5.25V by an external resistor divider from VOUT. |
| 6 | VOUT | power_out | Output voltage sense pin and drain of the internal synchronous rectifier, with a 4.7µF minimum output filter capacitor placed as close as possible; the absolute maximum is -0.3V to 6V. |
| 7 | GND | power_in | Exposed pad is ground and must be soldered to the PC board ground plane, which also conducts heat away from the package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Voltage | VIN | -0.3 | 6 | V | 2 | ||
| SW Voltage DC | -0.3 | 6 | V | DC | 2 | ||
| SW Voltage pulsed | -0.3 | 7 | V | Pulsed <100ns | 2 | ||
| SHDN, FB Voltage | -0.3 | 6 | V | 2 | |||
| VOUT Voltage | VOUT | -0.3 | 6 | V | 2 | ||
| Operating Temperature Range | -40 | 85 | °C | Notes 2, 5 | 2 | ||
| Storage Temperature Range | -65 | 150 | °C | Note 1 | 2 | ||
| Minimum Start-Up Input Voltage | 0.68 | 0.8 | V | ILOAD = 1mA | 2 | ||
| Input Voltage Range After Start-Up | 0.5 | 5 | V | l: over -40°C to 85°C; minimum voltage is load dependent | 2 | ||
| Output Voltage Adjust Range | 1.5 | 5.25 | V | l: over -40°C to 85°C | 2 | ||
| Feedback Pin Voltage | 1.165 | 1.195 | 1.225 | V | l: over -40°C to 85°C | 2 | |
| Feedback Pin Input Current | 1 | 50 | nA | VFB = 1.30V | 2 | ||
| Quiescent Current, Shutdown | 0.01 | 1 | µA | VSHDN = 0V, not including switch leakage, VOUT = 0V | 2 | ||
| Quiescent Current, Active | 250 | 500 | µA | Measured on VOUT, nonswitching | 2 | ||
| Quiescent Current, Burst | 9 | 18 | µA | Measured on VOUT, FB > 1.230V (LTC3526L only) | 2 | ||
| N-Channel MOSFET Switch Leakage Current | 0.1 | 5 | µA | VSW = 5V | 2 | ||
| P-Channel MOSFET Switch Leakage Current | 0.1 | 10 | µA | VSW = 5V, VOUT = 0V | 2 | ||
| N-Channel MOSFET Current Limit | 550 | 750 | mA | l: over -40°C to 85°C | 2 | ||
| Maximum Duty Cycle | 87 | 90 | % | VFB = 1.15V; l: over -40°C to 85°C | 2 | ||
| Minimum Duty Cycle | 0 | % | VFB = 1.3V; l: over -40°C to 85°C | 2 | |||
| Switching Frequency | 0.75 | 1 | 1.25 | MHz | l: over -40°C to 85°C | 2 | |
| SHDN Pin Input High Voltage | 0.8 | V | 2 | ||||
| SHDN Pin Input Low Voltage | 0.3 | V | 2 | ||||
| Maximum Junction Temperature | TJMAX | 125 | °C | 2 | |||
| Thermal Resistance, Junction to Ambient | θJA | 102 | °C/W | Exposed pad soldered to PC board ground plane (Note 6) | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | pin copper area will help to lower the die temperature. A | 10 |
CAD (KiCad official)
- Symbol:
LTC3526LEDC#TRPBF - Footprint:
Package_DFN_QFN:DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: DFN-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
ltc3526ledc-trpbf-etched.step/ltc3526ledc-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc3526ledc-trpbf.step/ltc3526ledc-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
977d55c7116e1404, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).