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LTC3260EMSE#PBF

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Analog Devices Charge Pumps, MSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC3260EMSE#PBF

Analog Devices · Charge Pumps · MSOP-16-EP

LTC3260EMSE#PBF from Analog Devices, in a MSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN+ input Logic input; a logic high enables the positive LDO+ regulator, with the EN+ rising threshold specified at 1.1 V to 2.0 V in the electrical characteristics.
2 RT input Frequency programming pin; a resistor from RT to GND sets the charge pump switching frequency between 50 kHz and 500kHz, and tying RT to GND selects a fixed 500 kHz.
3 BYP- passive LDO- reference bypass pin; a capacitor from BYP- to GND reduces LDO- output noise, and the pin should be left floating if unused.
4 ADJ- input Feedback input for the negative LDO regulator, which servos to a fixed -1.2 V when the control loop is complete.
5 LDO- power_out Negative LDO regulator output, which requires a low ESR capacitor of at least 2µF to ground for stability.
6 VOUT power_out Charge pump output; driven to -VIN in constant frequency mode (MODE low) or regulated to -0.94 • VIN in Burst Mode operation (MODE high).
7 C- passive Flying capacitor negative connection.
8 NC unconnected No connect on the MSOP package; not connected to the die and should be left floating, connected to ground, or shorted to an adjacent pin.
9 NC unconnected No connect on the MSOP package; not connected to the die and should be left floating, connected to ground, or shorted to an adjacent pin.
10 C+ passive Flying capacitor positive connection.
11 VIN power_in Input voltage for both the charge pump and the positive LDO+ regulator, specified over 4.5 V to 32 V, and should be bypassed with a low impedance ceramic capacitor.
12 LDO+ power_out Positive LDO regulator output, which requires a low ESR capacitor of at least 2µF to ground for stability and supplies up to 50 mA.
13 EN- input Logic input; a logic high enables the inverting charge pump as well as the negative LDO regulator.
14 MODE input Logic input selecting charge pump operation: logic high forces Burst Mode operation and logic low forces constant frequency open-loop inverter operation.
15 ADJ+ input Feedback input for the positive LDO regulator, which servos to a fixed 1.2 V when the control loop is complete.
16 BYP+ passive LDO+ reference bypass pin; a capacitor from BYP+ to GND reduces LDO+ output noise, and the pin should be left floating if unused.
17 GND power_in Ground; the exposed pad must be soldered to the PC board ground plane for proper functionality and rated thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-16-EP
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN, EN+, EN-, MODE voltage -0.3 36 V 2
LDO+ voltage -16 36 V 2
VOUT, LDO- voltage -36 0.3 V 2
RT, ADJ+ voltage -0.3 6 V 2
BYP+ voltage -0.3 2.5 V 2
ADJ- voltage -6 0.3 V 2
BYP- voltage -2.5 0.3 V 2
Operating junction temperature range TJ -55 150 °C Note 2 2
Storage temperature range -65 150 °C 2
Operating temperature range (E grade, MSE package) -40 125 °C LTC3260EMSE#PBF, 16-Lead Plastic MSOP (Order Information) 2
Junction temperature guaranteed range (E grade) 0 85 °C LTC3260E guaranteed junction temperature (Note 2) 4
Input Voltage Range VIN 4.5 32 V 3
VIN Undervoltage Lockout Threshold, VIN Rising VUVLO 3.4 3.8 V VIN Rising 3
VIN Undervoltage Lockout Threshold, VIN Falling VUVLO 3.6 4 V VIN Falling 3
VIN Quiescent Current, shutdown IVIN 2 5 µA Shutdown, EN+ = EN- = 0V 3
VIN Quiescent Current, EN- low IVIN 30 50 µA EN- = 0V, ILDO+ = 0mA 3
VIN Quiescent Current, Burst Mode, EN+ low IVIN 80 160 µA MODE = VIN, EN+ = 0V, IVOUT = ILDO- = 0mA 3
VIN Quiescent Current, Burst Mode, both LDOs on IVIN 100 200 µA MODE = VIN, IVOUT = ILDO+ = ILDO- = 0mA 3
VIN Quiescent Current, constant frequency IVIN 3.5 5.5 mA MODE = 0V, IVOUT = 0mA 3
Oscillator Frequency fOSC 450 500 550 kHz RT = GND 3
Max IVOUT Short-Circuit Current ISHORT_CKT 100 160 250 mA VOUT = GND 3
MODE Threshold Rising VMODE(H) 1.1 2 V 3
MODE Threshold Falling VMODE(L) 0.4 1 V 3
LDO+ Output Voltage Range 1.2 32 V 3
ADJ+ Reference Voltage VADJ+ 1.176 1.2 1.224 V 3
ADJ+ Input Current IADJ+ -50 50 nA VADJ+ = 1.2V 3
LDO+ Short-Circuit Current ILDO+(SC) 50 100 mA 3
LDO+ Dropout Voltage VDROPOUT+ 400 800 mV ILDO+ = 50mA 3
EN+ Threshold Rising VEN+(H) 1.1 2 V 3
EN+ Threshold Falling VEN+(L) 0.4 1 V 3
LDO- Output Voltage Range -32 -1.2 V 3
ADJ- Reference Voltage VADJ- -1.224 -1.2 -1.176 V 3
ADJ- Input Current IADJ- -50 50 nA VADJ- = -1.2V 3
LDO- Short-Circuit Current ILDO-(SC) 50 100 mA 3
LDO- Dropout Voltage VDROPOUT- 200 500 mV ILDO- = 50mA 3
EN- Threshold Rising VEN(H) 1.1 2 V 3
EN- Threshold Falling VEN(L) 0.4 1 V 3
Thermal impedance, junction to ambient (MSE package) θJA 43 °C/W 16-Lead MSOP (MSE) package 2

CAD (KiCad official)

  • Symbol: LTC3260EMSE#PBF
  • Footprint: Package_SO:MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • 3D model: MSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: ltc3260emse-pbf-etched.step / ltc3260emse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc3260emse-pbf.step / ltc3260emse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 2c8a092d7610a683, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF