component
LTC321XT5
Public Made by Adomby adom
Linearin Operational Amplifier, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| ltc321xt5-etched.glb | 16d ago |
| ltc321xt5-etched.step | 16d ago |
| ltc321xt5-hero.glb | 16d ago |
| ltc321xt5-hero.overlay.json | 16d ago |
| ltc321xt5.glb | 16d ago |
| ltc321xt5.kicad_mod | 16d ago |
| ltc321xt5.kicad_sym | 16d ago |
| ltc321xt5.lbr | 16d ago |
| ltc321xt5.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
LTC321XT5
Linearin · Operational Amplifier · SOT-23-5L
LTC321XT5 from Linearin, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output. |
| 2 | -VS | power_in | Negative power supply; the supply range is 1.8 V to 5.5 V (VS+ to VS-), and VS+ to VS- must not exceed 10 V. |
| 3 | +IN | input | Non-inverting input of the amplifier; the voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 4 | -IN | input | Inverting input of the amplifier; the voltage range is from (VS- - 0.1 V) to (VS+ + 0.1 V). |
| 5 | +VS | power_in | Positive power supply; the supply range is 1.8 V to 5.5 V, and VS+ to VS- must not exceed 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | SOT-23-5L |
| Category | Operational Amplifier/Comparator |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -3 | 0.7 | 3 | mV | 3 | |
| Offset voltage drift | VOS TC | 1 | 3.5 | μV/℃ | TA = −40 to +125 ℃ | 3 | |
| Power supply rejection ratio | PSRR | 80 | 110 | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 | |
| Power supply rejection ratio | PSRR | 75 | dB | TA = −40 to +125 ℃ | 3 | ||
| Input bias current | IB | 5 | 50 | pA | 3 | ||
| Input bias current | IB | 200 | pA | TA = −40 to +85 ℃ | 3 | ||
| Input bias current | IB | 2000 | pA | TA = −40 to +125 ℃ | 3 | ||
| Input offset current | IOS | 10 | 50 | pA | 3 | ||
| Common-mode rejection ratio | CMRR | 70 | 83 | dB | VS = 5.5 V, VCM = −0.1 to 5.6 V | 3 | |
| Common-mode rejection ratio | CMRR | 65 | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 | ||
| Common-mode rejection ratio | CMRR | 65 | 77 | dB | VS = 2.0 V, VCM = −0.1 to 2.1 V | 3 | |
| Common-mode rejection ratio | CMRR | 60 | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 | ||
| Open-loop voltage gain | AVOL | 90 | 105 | dB | RL = 50 kΩ, VO = 0.05 to 3.5 V | 3 | |
| Open-loop voltage gain | AVOL | 85 | dB | TA = −40 to +125 ℃ | 3 | ||
| Open-loop voltage gain | AVOL | 85 | 100 | dB | RL = 2 kΩ, VO = 0.15 to 3.5 V | 3 | |
| Open-loop voltage gain | AVOL | 80 | dB | TA = −40 to +125 ℃ | 3 | ||
| Operating supply voltage | VS | 1.8 | 5.5 | V | 4 | ||
| Quiescent current (per amplifier) | IQ | 85 | 120 | μA | 4 | ||
| Quiescent current (per amplifier) | IQ | 150 | μA | TA = −40 to +125 ℃ | 4 | ||
| Operating temperature range | TA | -40 | 125 | ℃ | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 2 | ||
| Junction temperature | TJ | 150 | ℃ | 2 | |||
| Supply voltage | VS+ to VS- | 10 | V | 2 | |||
| Signal input terminals: current | -10 | 10 | mA | 2 | |||
| Lead temperature range (soldering) | 260 | ℃ | Soldering 10 sec | 2 | |||
| Electrostatic discharge voltage, human body model | -5000 | 5000 | V | Human body model (HBM), per MIL-STD-883J / Method 3015.9 | 2 | ||
| Electrostatic discharge voltage, charged device model | -2000 | 2000 | V | Charged device model (CDM), per ESDA/JEDEC JS-002-2014 | 2 | ||
| Electrostatic discharge voltage, machine model | -250 | 250 | V | Machine model (MM), per JESD22-A115C | 2 | ||
| Package thermal resistance, junction to ambient | θJA | 190 | ℃/W | SOT23-5L package | 4 |
CAD (KiCad official)
- Symbol:
LTC321XT5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
ltc321xt5-etched.step/ltc321xt5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc321xt5.step/ltc321xt5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Linearin datasheet (19 pp, sha256
a403a26b7030c634, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).