LTC2952IUF#PBF from Analog Devices, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VM	input	Voltage monitor input to an accurate comparator with a 0.5V threshold that, together with WDE, controls the RST output; tie to GND if unused.
2	PFI	input	Power fail input to a high-impedance comparator with 0.5V falling threshold and 15mV hysteresis that controls PFO; tie to GND if unused.
3	WDE	input	Three-state watchdog/extend input; an edge is needed within the 1.6s watchdog timeout, and an edge within the 400ms tKILL,OFF WAIT period extends the shutdown wait by another 400ms.
4	PB	input	Pushbutton input to a comparator with 0.775V falling threshold and 25mV hysteresis, with a 10μA internal pull-up to 4V, controlling on/off via EN; leave open if unused.
5	RST	output	Open-drain reset output that pulls low when VM is below 0.5V and stays low 200ms after VM rises above 0.5V or after a 1.6s watchdog timeout.
6	PFO	output	Open-drain power fail output that pulls low when PFI is below 0.5V; leave open or tie to GND if unused.
7	ONT	input	On timing input; attach 110pF to GND per additional millisecond of turn-on debounce beyond the internal 26ms, or leave open.
8	OFFT	input	Off timing input; attach 110pF to GND per additional millisecond of turn-off debounce beyond the internal 26ms, or leave open.
9	GND	power_in	Device ground.
10	INT	output	Open-drain interrupt output that asserts low 26ms after the initial falling edge of a pushbutton off event and during power-down; leave open or tie to GND if unused.
11	EN	output	High-voltage open-drain pull-down DC/DC enable output that goes high impedance on a valid turn-on and pulls low at the end of a valid power-down or when KILL is driven low.
12	G2	output	Secondary P-channel MOSFET gate drive output that regulates a 20mV forward voltage (VFR) between V2 and VS; leave open if unused.
13	V2	power_in	Secondary input supply voltage of 2.7V to 28V and anode input of the secondary ideal diode driver; optional 0.1μF to 10μF bypass capacitor.
14	VS	power_in	Power sense input supplying internal circuitry and the cathode input to the ideal diode drivers; bypass to ground with at least 0.1μF.
15	V1	power_in	Primary input supply voltage of 2.7V to 28V and anode input of the primary ideal diode driver; optional 0.1μF to 10μF bypass capacitor.
16	G1	output	Primary P-channel MOSFET gate drive output that regulates a 20mV forward voltage (VFR) between V1 and VS; leave open if unused.
17	G1STAT	output	Open-drain primary ideal diode status output that goes from open to a strong pull-down when the primary P-channel switch is off; leave open or tie to GND if unused.
18	M2	input	High-impedance mode select input 2 with 0.5V falling threshold and 15mV hysteresis; enables the G1 ideal diode when M1 is low, or acts as a digital on/off input when M1 is high.
19	M1	input	Mode select input 1 with 0.5V falling threshold, 15mV hysteresis and a 3μA internal pull-up to 4V that, with M2, sets PowerPath and on/off behavior.
20	KILL	input	System power shutdown input with an accurate 0.5V falling threshold; low asserts EN low, and it is ignored for 400ms (tKILL,ON BLANK) after EN first goes high impedance.
21	EP	passive	Exposed pad (pin 21) that may be left open or connected to device ground.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	QFN-20-EP(4x4)
Category	Power Management ICs
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating Supply Voltage	VMAX	2.7		28	V	V1, V2 or VS	3
Quiescent Supply Current, both ideal diodes off	IIN_OFF		24	60	μA	V1 = 2.7V to 28V, V2 = 0V, VS = Open or V2 = 2.7V to 28V, V1 = 0V, VS = Open. Measured Current at V1 or V2.	3
Quiescent Supply Current at V1, both ideal diodes off	IIN_OFF		5	15	μA	V1 = 2.7V to 28V, V2 = 3.5V, VS = Open. Measured Current at V1.	3
Quiescent Supply Current at V2, both ideal diodes off	IIN_OFF		23	50	μA	V1 = 2.7V to 28V, V2 = 3.5V, VS = Open. Measured Current at V2.	3
Quiescent Supply Current, both ideal diodes on	IIN_ON		65	170	μA	V1 = VS = 2.7V to 28V, V2 = 0V or V2 = VS = 2.7V to 28V, V1 = 0V. Combined Current at V1 and VS or V2 and VS.	3
V2 Preferential Threshold Voltage	V2PREF_TH	3.3		3.8	V	V1 = 28V, VS = Open	3
Inter Pin Leakage to Highest Supply	ILEAK	-3		3	μA	V1 = 28V, V2 = VS = 0V; V1 = VS = 0V, V2 = 28V; V1 = V2 = 0V, VS = 28V	3
Ideal Diode Forward Regulation Voltage	VFR	10	20	35	mV	(V1 or V2), VS, 2.7V ≤ (V1 or V2) ≤ 28V	3
Fast Reverse Turn-Off Threshold Voltage	VRTO	-64	-35	-20	mV	(V1 or V2), VS, ∆IG ≤ -100μA/mV	3
Gate Turn-Off Current	IG(SRC)	-10	-5	-2	μA	G1 = G2 = VMAX, 1.5V	3
Gate Turn-On Current	IG(SNK)	2	5	10	μA	VS = (V1 or V2), 40mV, G1 = G2 = VMAX -1.5V	3
Gate Fast Turn-Off Source Current	IG(FASTSRC)	-10	-2.5	-0.5	mA	VS = (V1 or V2) + 0.1V, G1 = G2 = VMAX -1.5V	3
Gate Fast Turn-On Sink Current	IG(FASTSNK)	0.3	0.7	2	mA	V1 = V2 = 5V to 28V, VS = (V1 or V2), 0.1V, G1 = G2 = VMAX, 1.5V	3
Gate Off Voltage	VG(OFF)		0.2	0.4	V	IGX = -2μA, VX = 2.7V to 28V, VS = VX + 0.1V, Measure VMAX, VGX	3
Gate Turn-On Time	tG(ON)	0.1	2.5	10	μs	VG(OFF) to VGS ≤ -3V, CGATE = 1nF, V1 = V2 = 12V	3
Gate Turn-Off Time	tG(OFF)	0.1	2.5	10	μs	VG(ON) to VGS ≥ -1.5V, CGATE = 1nF, V1 = V2 = 12V	3
PB Input Current	IPB	-25	-10	-1	μA	VPB(VOC) < VPB ≤ 28V	3
PB Input Current	IPB	-1		1	μA	0V ≤ VPB < VPB(VOC)	3
PB Input Threshold Voltage	VTH_PB	0.65	0.77	0.8	V	PB Falling From High to Low	3
PB Input Hysteresis	VHYS_PB	10	25	150	mV		3
ONT/OFFT Pull-Up/Pull-Down Current	IONT,OFFT	1.6	2	2.4	μA	VONT, VOFFT = 0V (Pull-Up), 1.5V (Pull-Down); magnitude, ±	4
Internal Default On-Time/Off-Time	tDB,ON/OFF	18	26	34	ms	CONT = Open	4
Additional Adjustable Turn-On/Turn-Off Time	tONT,OFFT	10	15	20	ms	CONT = 1500pF, COFFT = 1500pF	4
VM Input Reset Threshold	VTH_VM	0.492	0.5	0.508	V	Both Falling and Rising	4
PFI, M1, M2, KILL Input Threshold Voltage	VTH	0.492	0.5	0.508	V	Falling	4
PFI, M1, M2, KILL Input Hysteresis	VHYS	5	15	25	mV		4
VM, PFI, M2, KILL Input Current	IIN_LKG	-0.1		0.1	μA	V = 0.5V	4
M1 Input Pull-Up Current	IM1_SRC	-5	-3	-1.5	μA	M1 = 1V	4
M1 Input Leak Current	IM1_LKG	-0.1		0.1	μA	M1 = 6V	4
WDE Input High Threshold Voltage	VWDE(H,TH)	1.5			V		4
WDE Input Low Threshold Voltage	VWDE(L,TH)			0.3	V		4
WDE High Low Input Current	IWDE(IN,HL)	-25		25	μA		4
WDE Hi-Z Input Current	IWDE(IN,HZ)	-10		10	μA	VWDE = 0.7V, 1.1V	4
Open-Drain Output Leakage Current	IOUT_LKG	-1		1	μA	VPIN = 5V	4
Open-Drain Output Voltage Low	VOL			0.4	V	IPIN = 1mA	4
EN Leakage Current	IEN(LKG)	-1		1	μA	VEN = 28V, EN Sink Current Off	4
EN Voltage Output Low	VEN(VOL)			0.4	V	IEN = 3mA	4
EN Voltage Output Low	VEN(VOL)		0.05	0.3	V	V1 = 1.2V and/or V2 = 1.2V, IEN = 100μA	4
Reset Timeout Period	tRST	140	200	260	ms		4
Watchdog Timeout Period	tWDE	1.1	1.6	2.1	s		4
Minimum Period Between Consecutive Edges	tWDE(PW MIN)		5	10	μs		4
INT Minimum Pulse Width	tINT(MIN)	10	50	250	μs	Minimum Measured Time PB Rising to INT Rising	5
KILL Minimum Pulse Width	tKILL(PW)		150	500	μs	Full Swing Pulse From 5V to 0V	5
KILL On Blanking	tKILL,ON BLANK	270	400	530	ms	KILL = 0V, Measured Time Between EN Rising → EN Falling	5
KILL Wait Time	tKILL,OFF WAIT	270	400	530	ms	KILL = 1V, COFFT = OPEN, Measured Time Between INT Falling → EN Falling	5
Enable Lockout Time	tEN, LOCKOUT	270	400	530	ms	Measured Time Between EN Falling → EN Rising	5
Supply Voltage V1, V2, VS	V1, V2, VS	-0.3		30	V		2
PB Input Voltage	PB	-6			V	upper limit MAX(V1, V2, VS)	2
ONT, OFFT Input Voltage	ONT, OFFT	-0.3		3	V		2
M1, M2, PFI, VM, WDE, KILL Input Voltage		-0.3		7	V		2
G1, G2, EN Output Voltage		-0.3			V	upper limit MAX(V1, V2, VS)	2
G1STAT, PFO, RST, INT Output Voltage		-0.3		7	V		2
PB Input Current		-1		0.1	mA	-1mA to 100μA	2
Operating Temperature Range (LTC2952I)		-40		85	°C		2
Storage Temperature Range		-65		150	°C		2
Maximum Junction Temperature	TJMAX			125	°C	UF package	2
Junction-to-Ambient Thermal Resistance	θJA		37		°C/W	UF package	2

CAD (KiCad official)

Symbol: LTC2952IUF#PBF
Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
3D model files: ltc2952iuf-pbf-etched.step / ltc2952iuf-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc2952iuf-pbf.step / ltc2952iuf-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (30 pp, sha256 3e7678e422b6453e, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

LTC2952IUF#PBF

Verified LTC2952IUF#PBF

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3D Model

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