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LTC2642ACMS-16#PBF
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Analog Devices Digital To Analog Converters (DAC), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LTC2642ACMS-16#PBF
Analog Devices · Digital To Analog Converters (DAC) · MSOP-10
LTC2642ACMS-16#PBF from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | input | Reference voltage input; apply an external reference between 2V and VDD. |
| 2 | CS | input | Serial interface chip select/load input; when CS is low SCLK shifts data in on DIN, and when CS goes high the 16-bit word is latched and the DAC is updated. |
| 3 | SCLK | input | Serial interface clock input, CMOS and TTL compatible; data on DIN is transferred on the rising edge of SCLK. |
| 4 | DIN | input | Serial interface data input; data is applied to DIN for transfer to the device at the rising edge of SCLK. |
| 5 | CLR | input | Asynchronous clear input; a logic low clears the DAC to midscale on the LTC2642. |
| 6 | VOUT | output | DAC output voltage; the output range is 0V to VREF. |
| 7 | INV | passive | Center tap of the internal scaling resistors; connect to an external amplifier's inverting input in bipolar mode. |
| 8 | RFB | passive | Feedback resistor; connect to an external amplifier's output in bipolar mode, giving a bipolar output range of -VREF to VREF. |
| 9 | VDD | power_in | Supply voltage, set between 2.7V and 5.5V. |
| 10 | GND | power_in | Circuit ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Data Acquisition |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2.7 | 5.5 | V | 5 | ||
| Supply Current | IDD | 120 | 200 | µA | Digital Inputs = 0V or VDD | 5 | |
| Reference Input Range | VREF | 2 | V | 4 | |||
| Reference Input Resistance, unipolar mode (LTC2641) | RREF | 11 | 14.8 | kΩ | Unipolar mode; Note 5 | 4 | |
| Reference Input Resistance, bipolar mode (LTC2642) | RREF | 8.5 | 11.4 | kΩ | Bipolar mode; Note 5 | 4 | |
| Digital Input High Voltage | VIH | 2.4 | V | VCC = 3.6V to 5.5V | 4 | ||
| Digital Input High Voltage | VIH | 2 | V | VCC = 2.7V to 3.6V | 4 | ||
| Digital Input Low Voltage | VIL | 0.8 | V | VCC = 4.5V to 5.5V | 5 | ||
| Digital Input Low Voltage | VIL | 0.6 | V | VCC = 2.7V to 4.5V | 5 | ||
| Digital Input Current | IIN | -1 | 1 | µA | VIN = GND to VDD | 5 | |
| Digital Input Capacitance | CIN | 3 | 10 | pF | Note 6 | 5 | |
| Resolution | N | 16 | Bits | LTC2642A-16 column | 4 | ||
| Monotonicity | 16 | Bits | LTC2642A-16 column | 4 | |||
| Differential Nonlinearity | DNL | -1 | 1 | LSB | Note 3 | 4 | |
| Integral Nonlinearity | INL | -1 | 1 | LSB | Note 3 | 4 | |
| Zero Code Offset Error | ZSE | 2 | LSB | Code = 0 | 4 | ||
| Gain Error | GE | -5 | 5 | LSB | LTC2642A-16 column | 4 | |
| Bipolar Zero Offset Error | BZE | -5 | 5 | LSB | Bipolar (LTC2642) | 4 | |
| Power Supply Rejection | PSR | -1 | 1 | LSB | ΔVDD = ±10% | 4 | |
| Zero Code Tempco | ZSTC | -0.05 | 0.05 | ppm/°C | 4 | ||
| Gain Error Tempco | GETC | -0.1 | 0.1 | ppm/°C | 4 | ||
| Bipolar Zero Tempco | BZSTC | -0.1 | 0.1 | ppm/°C | Bipolar (LTC2642) | 4 | |
| Bipolar Ratio Error (RFB/RINV) | -0.015 | 0.015 | % | Bipolar (LTC2642); Note 7 | 4 | ||
| DAC Output Resistance | ROUT | -20 | 20 | % | Typical; Note 4 | 5 | |
| DAC Output Resistance | ROUT | 6.2 | kΩ | Note 4 | 4 | ||
| ROUT Tempco | ROUT | -50 | 50 | ppm/°C | Typical | 15 | |
| DIN Valid to SCLK Setup Time | t1 | 10 | ns | 5 | |||
| DIN Valid to SCLK Hold Time | t2 | 0 | ns | 5 | |||
| SCLK Pulse Width High | t3 | 9 | ns | 5 | |||
| SCLK Pulse Width Low | t4 | 9 | ns | 5 | |||
| CS Pulse High Width | t5 | 10 | ns | 5 | |||
| LSB SCLK High to CS High | t6 | 8 | ns | 5 | |||
| CS Low to SCLK High | t7 | 8 | ns | 5 | |||
| CS High to SCLK Positive Edge | t8 | 8 | ns | 5 | |||
| CLR Pulse Width Low | t9 | 15 | ns | 5 | |||
| SCLK Frequency | fSCLK | 50 | MHz | 50% Duty Cycle | 5 | ||
| VDD to GND | VDD | -0.3 | 6 | V | 2 | ||
| CS, SCLK, DIN, CLR to GND | -0.3 | V | Max is (VDD + 0.3V) or 6V as printed | 2 | |||
| REF, VOUT, INV to GND | -0.3 | V | Max is (VDD + 0.3V) or 6V as printed | 2 | |||
| RFB to INV | -6 | 6 | V | 2 | |||
| RFB to GND | -6 | 6 | V | 2 | |||
| Maximum Junction Temperature | TJMAX | 125 | °C | Note 2 | 2 | ||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Operating Temperature Range (C grade) | TA | 0 | 70 | °C | LTC2642C grade, commercial | 2 | |
| Thermal Resistance, junction to ambient (MS MSOP-10) | θJA | 120 | °C/W | MS package | 2 |
CAD (KiCad official)
- Symbol:
LTC2642ACMS-16#PBF - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ltc2642acms-16-pbf-etched.step/ltc2642acms-16-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc2642acms-16-pbf.step/ltc2642acms-16-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
beb9dfd8807aa419, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).