component
LTC2630CSC6-LZ8#TRPBF
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTC2630CSC6-LZ8#TRPBF
Analog Devices · Digital To Analog Converters (DAC) · SC-70-6
LTC2630CSC6-LZ8#TRPBF from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS/LD | input | Serial interface chip select/load input: when taken low, SCK is enabled to shift SDI data into the register, and the rising edge executes the command. |
| 2 | SCK | input | Serial interface clock input, CMOS and TTL compatible, with data on SDI clocked into the DAC on its rising edge (SCK frequency up to 50MHz). |
| 3 | SDI | input | Serial interface data input clocked into the DAC on the rising edge of SCK; the device accepts input word lengths of either 24 or 32 bits. |
| 4 | VCC | power_in | Supply voltage input, 2.7V ≤ VCC ≤ 5.5V for the LTC2630-L, also used as the reference input in supply-as-reference mode, and to be bypassed to GND with a 0.1µF capacitor. |
| 5 | GND | power_in | Ground reference pin for the device. |
| 6 | VOUT | output | DAC analog voltage output, which is rail-to-rail and stable driving capacitive loads of up to 500pF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SC-70-6 |
| Category | Data Acquisition |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Voltage For Specified Performance | VCC | 2.7 | 5.5 | V | LTC2630-L (VFS = 2.5V) | 4 | |
| Monotonicity | 8 | Bits | VCC = 3V, Internal Ref. (Note 3) | 4 | |||
| Differential Nonlinearity | DNL | -0.5 | 0.5 | LSB | VCC = 3V, Internal Ref. (Note 3) | 4 | |
| Differential Nonlinearity | DNL | -0.5 | 0.5 | LSB | VCC = 5V, Internal Ref. (Note 3) | 6 | |
| Integral Nonlinearity | INL | 0.05 | 0.5 | LSB | VCC = 3V, Internal Ref. (Note 3) | 4 | |
| Integral Nonlinearity | INL | 0.05 | 0.5 | LSB | VCC = 5V, Internal Ref. (Note 3) | 6 | |
| Zero Scale Error | ZSE | 0.5 | 5 | mV | VCC = 3V, Internal Ref., Code = 0 | 4 | |
| Zero Scale Error | ZSE | 0.5 | 5 | mV | VCC = 5V, Internal Ref., Code = 0 | 6 | |
| Offset Error | VOS | 0.5 | 5 | mV | VCC = 3V, Internal Ref. (Note 4) | 4 | |
| Offset Error | VOS | 0.5 | 5 | mV | VCC = 5V, Internal Ref. (Note 4) | 6 | |
| Full Scale Error | FSE | 0.2 | 0.8 | %FSR | VCC = 3V, Internal Ref. | 4 | |
| Full Scale Error | FSE | 0.2 | 0.8 | %FSR | VCC = 5V, Internal Ref. | 6 | |
| Full Scale Voltage Temperature Coefficient (C-Grade) | VFSTC | -10 | 10 | ppm/°C | VCC = 3V, Internal Ref. (Note 9) | 4 | |
| Full Scale Voltage Temperature Coefficient (C-Grade) | VFSTC | -10 | 10 | ppm/°C | VCC = 5V, Internal Ref. (Note 9) | 6 | |
| Load Regulation | 0.008 | 0.016 | LSB/mA | Internal Ref., Mid-Scale, VCC = 3V ±10%, -5mA ≤ IOUT ≤ 5mA | 4 | ||
| Load Regulation | 0.006 | 0.01 | LSB/mA | VCC = 5V ±10%, Internal Ref., Mid-Scale, -10mA ≤ IOUT ≤ 10mA | 6 | ||
| DC Output Impedance | ROUT | 0.08 | 0.156 | Ω | Internal Ref., Mid-Scale, VCC = 3V ±10%, -5mA ≤ IOUT ≤ 5mA | 4 | |
| DC Output Impedance | ROUT | 0.1 | 0.156 | Ω | VCC = 5V ±10%, Internal Ref., Mid-Scale, -10mA ≤ IOUT ≤ 10mA | 6 | |
| DAC Output Span | VOUT | 0 | V | Supply as Reference, 0V to VCC (VFS = 2.5V part) | 4 | ||
| DAC Output Span | VOUT | 0 | 2.5 | V | Internal Reference | 4 | |
| Power Supply Rejection | PSR | -80 | dB | VCC = 3V ±10% or 5V ±10% | 4 | ||
| Short Circuit Output Current Sinking | ISC | 27 | 50 | mA | VFS = VCC = 5.5V, Zero Scale; VOUT Shorted to VCC | 4 | |
| Short Circuit Output Current Sourcing | ISC | -50 | -28 | mA | VFS = VCC = 5.5V, Full Scale; VOUT Shorted to GND | 4 | |
| Supply Current | ICC | 160 | 220 | µA | VCC = 3V, Supply as Reference | 4 | |
| Supply Current | ICC | 180 | 240 | µA | VCC = 3V, Internal Reference | 4 | |
| Supply Current | ICC | 180 | 250 | µA | VCC = 5V, Supply as Reference | 4 | |
| Supply Current | ICC | 190 | 260 | µA | VCC = 5V, Internal Reference | 4 | |
| Supply Current in Power-Down Mode | ISD | 0.36 | 1.8 | µA | VCC = 5V, C-Grade, I-Grade | 4 | |
| Digital Input High Voltage | VIH | 2.4 | V | VCC = 3.6V to 5.5V | 4 | ||
| Digital Input High Voltage | VIH | 2 | V | VCC = 2.7V to 3.6V | 4 | ||
| Digital Input Low Voltage | VIL | 0.8 | V | VCC = 4.5V to 5.5V | 4 | ||
| Digital Input Low Voltage | VIL | 0.6 | V | VCC = 2.7V to 4.5V | 4 | ||
| Digital Input Leakage | ILK | -1 | 1 | µA | VIN = GND to VCC | 4 | |
| Digital Input Capacitance | CIN | 2.5 | pF | Note 7 | 4 | ||
| SDI Valid to SCK Setup | t1 | 4 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| SDI Valid to SCK Hold | t2 | 4 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| SCK High Time | t3 | 9 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| SCK Low Time | t4 | 9 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| CS/LD Pulse width | t5 | 10 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| SCK High to CS/LD High | t6 | 7 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| CS/LD Low to SCK High | t7 | 7 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| CS/LD High to SCK Positive Edge | t10 | 7 | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 | ||
| SCK Frequency | 50 | MHz | 50% Duty Cycle | 5 | |||
| Supply Voltage (VCC) | VCC | -0.3 | 6 | V | 2 | ||
| CS/LD, SCK, SDI | -0.3 | 6 | V | 2 | |||
| VOUT | VOUT | -0.3 | V | max is min(VCC + 0.3V, 6V) | 2 | ||
| Operating Temperature Range (LTC2630C) | 0 | 70 | °C | C-Grade (Commercial) | 2 | ||
| Maximum Junction Temperature | 150 | °C | 2 | ||||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Voltage Output Slew Rate | 1 | V/µs | 5 | ||||
| Settling Time (8-bit) | tS | 3.2 | µs | VCC = 3V (Note 8), ±0.39% (±1LSB at 8 Bits) | 5 | ||
| Capacitive Load Driving | 500 | pF | 5 | ||||
| Glitch Impulse | 2 | nV•s | At Mid-Scale Transition | 5 | |||
| Output Voltage Noise Density | en | 140 | nV/√Hz | At f = 1kHz, Supply as Reference | 5 | ||
| Output Voltage Noise Density | en | 130 | nV/√Hz | At f = 10kHz, Supply as Reference | 5 | ||
| Output Voltage Noise Density | en | 160 | nV/√Hz | At f = 1kHz, Internal Reference | 5 | ||
| Output Voltage Noise Density | en | 150 | nV/√Hz | At f = 10kHz, Internal Reference | 5 | ||
| VOS Temperature Coefficient | VOSTC | 10 | µV/°C | VCC = 3V, Internal Ref. (Note 4) | 4 | ||
| VOS Temperature Coefficient | VOSTC | 10 | µV/°C | VCC = 5V, Internal Ref. (Note 4) | 6 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 300 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
LTC2630CSC6-LZ8#TRPBF - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
ltc2630csc6-lz8-trpbf-etched.step/ltc2630csc6-lz8-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc2630csc6-lz8-trpbf.step/ltc2630csc6-lz8-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (22 pp, sha256
f965ff4d9867b314, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTC2630CSC6-LZ8#TRPBF
**Analog Devices** · Digital To Analog Converters (DAC) · SC-70-6
LTC2630CSC6-LZ8#TRPBF from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS/LD | input | Serial interface chip select/load input: when taken low, SCK is enabled to shift SDI data into the register, and the rising edge executes the command. |
| 2 | SCK | input | Serial interface clock input, CMOS and TTL compatible, with data on SDI clocked into the DAC on its rising edge (SCK frequency up to 50MHz). |
| 3 | SDI | input | Serial interface data input clocked into the DAC on the rising edge of SCK; the device accepts input word lengths of either 24 or 32 bits. |
| 4 | VCC | power_in | Supply voltage input, 2.7V ≤ VCC ≤ 5.5V for the LTC2630-L, also used as the reference input in supply-as-reference mode, and to be bypassed to GND with a 0.1µF capacitor. |
| 5 | GND | power_in | Ground reference pin for the device. |
| 6 | VOUT | output | DAC analog voltage output, which is rail-to-rail and stable driving capacitive loads of up to 500pF. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SC-70-6 |
| Category | Data Acquisition |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Voltage For Specified Performance | VCC | 2.7 | | 5.5 | V | LTC2630-L (VFS = 2.5V) | 4 |
| Monotonicity | | 8 | | | Bits | VCC = 3V, Internal Ref. (Note 3) | 4 |
| Differential Nonlinearity | DNL | -0.5 | | 0.5 | LSB | VCC = 3V, Internal Ref. (Note 3) | 4 |
| Differential Nonlinearity | DNL | -0.5 | | 0.5 | LSB | VCC = 5V, Internal Ref. (Note 3) | 6 |
| Integral Nonlinearity | INL | | 0.05 | 0.5 | LSB | VCC = 3V, Internal Ref. (Note 3) | 4 |
| Integral Nonlinearity | INL | | 0.05 | 0.5 | LSB | VCC = 5V, Internal Ref. (Note 3) | 6 |
| Zero Scale Error | ZSE | | 0.5 | 5 | mV | VCC = 3V, Internal Ref., Code = 0 | 4 |
| Zero Scale Error | ZSE | | 0.5 | 5 | mV | VCC = 5V, Internal Ref., Code = 0 | 6 |
| Offset Error | VOS | | 0.5 | 5 | mV | VCC = 3V, Internal Ref. (Note 4) | 4 |
| Offset Error | VOS | | 0.5 | 5 | mV | VCC = 5V, Internal Ref. (Note 4) | 6 |
| Full Scale Error | FSE | | 0.2 | 0.8 | %FSR | VCC = 3V, Internal Ref. | 4 |
| Full Scale Error | FSE | | 0.2 | 0.8 | %FSR | VCC = 5V, Internal Ref. | 6 |
| Full Scale Voltage Temperature Coefficient (C-Grade) | VFSTC | -10 | | 10 | ppm/°C | VCC = 3V, Internal Ref. (Note 9) | 4 |
| Full Scale Voltage Temperature Coefficient (C-Grade) | VFSTC | -10 | | 10 | ppm/°C | VCC = 5V, Internal Ref. (Note 9) | 6 |
| Load Regulation | | | 0.008 | 0.016 | LSB/mA | Internal Ref., Mid-Scale, VCC = 3V ±10%, -5mA ≤ IOUT ≤ 5mA | 4 |
| Load Regulation | | | 0.006 | 0.01 | LSB/mA | VCC = 5V ±10%, Internal Ref., Mid-Scale, -10mA ≤ IOUT ≤ 10mA | 6 |
| DC Output Impedance | ROUT | | 0.08 | 0.156 | Ω | Internal Ref., Mid-Scale, VCC = 3V ±10%, -5mA ≤ IOUT ≤ 5mA | 4 |
| DC Output Impedance | ROUT | | 0.1 | 0.156 | Ω | VCC = 5V ±10%, Internal Ref., Mid-Scale, -10mA ≤ IOUT ≤ 10mA | 6 |
| DAC Output Span | VOUT | 0 | | | V | Supply as Reference, 0V to VCC (VFS = 2.5V part) | 4 |
| DAC Output Span | VOUT | 0 | | 2.5 | V | Internal Reference | 4 |
| Power Supply Rejection | PSR | | | -80 | dB | VCC = 3V ±10% or 5V ±10% | 4 |
| Short Circuit Output Current Sinking | ISC | 27 | | 50 | mA | VFS = VCC = 5.5V, Zero Scale; VOUT Shorted to VCC | 4 |
| Short Circuit Output Current Sourcing | ISC | -50 | | -28 | mA | VFS = VCC = 5.5V, Full Scale; VOUT Shorted to GND | 4 |
| Supply Current | ICC | | 160 | 220 | µA | VCC = 3V, Supply as Reference | 4 |
| Supply Current | ICC | | 180 | 240 | µA | VCC = 3V, Internal Reference | 4 |
| Supply Current | ICC | | 180 | 250 | µA | VCC = 5V, Supply as Reference | 4 |
| Supply Current | ICC | | 190 | 260 | µA | VCC = 5V, Internal Reference | 4 |
| Supply Current in Power-Down Mode | ISD | | 0.36 | 1.8 | µA | VCC = 5V, C-Grade, I-Grade | 4 |
| Digital Input High Voltage | VIH | 2.4 | | | V | VCC = 3.6V to 5.5V | 4 |
| Digital Input High Voltage | VIH | 2 | | | V | VCC = 2.7V to 3.6V | 4 |
| Digital Input Low Voltage | VIL | | | 0.8 | V | VCC = 4.5V to 5.5V | 4 |
| Digital Input Low Voltage | VIL | | | 0.6 | V | VCC = 2.7V to 4.5V | 4 |
| Digital Input Leakage | ILK | -1 | | 1 | µA | VIN = GND to VCC | 4 |
| Digital Input Capacitance | CIN | | | 2.5 | pF | Note 7 | 4 |
| SDI Valid to SCK Setup | t1 | 4 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| SDI Valid to SCK Hold | t2 | 4 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| SCK High Time | t3 | 9 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| SCK Low Time | t4 | 9 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| CS/LD Pulse width | t5 | 10 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| SCK High to CS/LD High | t6 | 7 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| CS/LD Low to SCK High | t7 | 7 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| CS/LD High to SCK Positive Edge | t10 | 7 | | | ns | VCC = 2.7V to 5.5V (See Figure 1) | 5 |
| SCK Frequency | | | | 50 | MHz | 50% Duty Cycle | 5 |
| Supply Voltage (VCC) | VCC | -0.3 | | 6 | V | | 2 |
| CS/LD, SCK, SDI | | -0.3 | | 6 | V | | 2 |
| VOUT | VOUT | -0.3 | | | V | max is min(VCC + 0.3V, 6V) | 2 |
| Operating Temperature Range (LTC2630C) | | 0 | | 70 | °C | C-Grade (Commercial) | 2 |
| Maximum Junction Temperature | | | | 150 | °C | | 2 |
| Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Voltage Output Slew Rate | | | 1 | | V/µs | | 5 |
| Settling Time (8-bit) | tS | | 3.2 | | µs | VCC = 3V (Note 8), ±0.39% (±1LSB at 8 Bits) | 5 |
| Capacitive Load Driving | | | | 500 | pF | | 5 |
| Glitch Impulse | | | 2 | | nV•s | At Mid-Scale Transition | 5 |
| Output Voltage Noise Density | en | | 140 | | nV/√Hz | At f = 1kHz, Supply as Reference | 5 |
| Output Voltage Noise Density | en | | 130 | | nV/√Hz | At f = 10kHz, Supply as Reference | 5 |
| Output Voltage Noise Density | en | | 160 | | nV/√Hz | At f = 1kHz, Internal Reference | 5 |
| Output Voltage Noise Density | en | | 150 | | nV/√Hz | At f = 10kHz, Internal Reference | 5 |
| VOS Temperature Coefficient | VOSTC | | 10 | | µV/°C | VCC = 3V, Internal Ref. (Note 4) | 4 |
| VOS Temperature Coefficient | VOSTC | | 10 | | µV/°C | VCC = 5V, Internal Ref. (Note 4) | 6 |
| Thermal Resistance Junction-to-Ambient | θJA | | 300 | | °C/W | | 2 |
## CAD (KiCad official)
- Symbol: `LTC2630CSC6-LZ8#TRPBF`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files: `ltc2630csc6-lz8-trpbf-etched.step` / `ltc2630csc6-lz8-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc2630csc6-lz8-trpbf.step` / `ltc2630csc6-lz8-trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914979991273472) (22 pp, sha256 `f965ff4d9867b314`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltc2630csc6-lz8-trpbf-datasheet.pdf)