component
LTC2320IUKG-14#PBF
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), QFN-52-EP(7x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Ray
ltc2320iukg-14-pbf: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the p…
49cef97
22d ago
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{
"schema_version": 1,
"type": "component",
"slug": "ltc2320iukg-14-pbf",
"title": "LTC2320IUKG-14#PBF",
"brief": "Analog Devices Analog To Digital Converters (ADCs), QFN-52-EP(7x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"adc-dac-data conversion",
"ltc2320iukg-14#pbf",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "LTC2320IUKG-14#PBF",
"manufacturer": "Analog Devices",
"package": "QFN-52-EP(7x8)",
"pin_count": 53,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Analog To Digital Converters (ADCs)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885897483849728",
"parts": {
"symbol": "ltc2320iukg-14-pbf.kicad_sym",
"footprint": "ltc2320iukg-14-pbf.kicad_mod",
"model_3d": "ltc2320iukg-14-pbf-etched.glb",
"model_3d_plain": "ltc2320iukg-14-pbf.glb",
"model_3d_step": "ltc2320iukg-14-pbf-etched.step",
"model_3d_step_plain": "ltc2320iukg-14-pbf.step",
"lbr": "ltc2320iukg-14-pbf.lbr"
},
"distributor_links": {
"lcsc": "C680019"
},
"pins": [
{
"number": "1",
"name": "AIN6–",
"type": "input",
"description": "Analog differential input pin for channel 6; full-scale range (AIN6+ - AIN6-) is ±REFOUT3 voltage; can be driven from VDD to GND."
},
{
"number": "2",
"name": "AIN6+",
"type": "input",
"description": "Analog differential input pin for channel 6; full-scale range (AIN6+ - AIN6-) is ±REFOUT3 voltage; can be driven from VDD to GND."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "4",
"name": "AIN5–",
"type": "input",
"description": "Analog differential input pin for channel 5; full-scale range (AIN5+ - AIN5-) is ±REFOUT3 voltage; can be driven from VDD to GND."
},
{
"number": "5",
"name": "AIN5+",
"type": "input",
"description": "Analog differential input pin for channel 5; full-scale range (AIN5+ - AIN5-) is ±REFOUT3 voltage; can be driven from VDD to GND."
},
{
"number": "6",
"name": "REFOUT3",
"type": "output",
"description": "Reference buffer 3 output; nominally outputs 4.096V; decouple with 10µF ceramic capacitor to GND; can be overdriven with external reference 1.25V to 5V if REFBUFEN grounded."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "8",
"name": "REF",
"type": "output",
"description": "Common 4.096V reference output; decouple to GND with 1µF low ESR ceramic capacitor; may be overdriven with single external reference for ADC cores 1-4."
},
{
"number": "9",
"name": "REFOUT2",
"type": "output",
"description": "Reference buffer 2 output; nominally outputs 4.096V; decouple with 10µF ceramic capacitor to GND; can be overdriven with external reference 1.25V to 5V if REFBUFEN grounded."
},
{
"number": "10",
"name": "AIN4–",
"type": "input",
"description": "Analog differential input pin for channel 4; full-scale range (AIN4+ - AIN4-) is ±REFOUT2 voltage; can be driven from VDD to GND."
},
{
"number": "11",
"name": "AIN4+",
"type": "input",
"description": "Analog differential input pin for channel 4; full-scale range (AIN4+ - AIN4-) is ±REFOUT2 voltage; can be driven from VDD to GND."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "13",
"name": "AIN3–",
"type": "input",
"description": "Analog differential input pin for channel 3; full-scale range (AIN3+ - AIN3-) is ±REFOUT2 voltage; can be driven from VDD to GND."
},
{
"number": "14",
"name": "AIN3+",
"type": "input",
"description": "Analog differential input pin for channel 3; full-scale range (AIN3+ - AIN3-) is ±REFOUT2 voltage; can be driven from VDD to GND."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power supply (3.3V or 5V); bypass to GND with 10µF and 0.1µF ceramic capacitors close to the part; VDD pins must be shorted together and driven from same supply."
},
{
"number": "16",
"name": "AIN2–",
"type": "input",
"description": "Analog differential input pin for channel 2; full-scale range (AIN2+ - AIN2-) is ±REFOUT1 voltage; can be driven from VDD to GND."
},
{
"number": "17",
"name": "AIN2+",
"type": "input",
"description": "Analog differential input pin for channel 2; full-scale range (AIN2+ - AIN2-) is ±REFOUT1 voltage; can be driven from VDD to GND."
},
{
"number": "18",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "19",
"name": "AIN1–",
"type": "input",
"description": "Analog differential input pin for channel 1; full-scale range (AIN1+ - AIN1-) is ±REFOUT1 voltage; can be driven from VDD to GND."
},
{
"number": "20",
"name": "AIN1+",
"type": "input",
"description": "Analog differential input pin for channel 1; full-scale range (AIN1+ - AIN1-) is ±REFOUT1 voltage; can be driven from VDD to GND."
},
{
"number": "21",
"name": "VDD",
"type": "power_in",
"description": "Power supply (3.3V or 5V); bypass to GND with 10µF and 0.1µF ceramic capacitors close to the part; VDD pins must be shorted together and driven from same supply."
},
{
"number": "22",
"name": "REFOUT1",
"type": "output",
"description": "Reference buffer 1 output; nominally outputs 4.096V; decouple with 10µF ceramic capacitor to GND; can be overdriven with external reference 1.25V to 5V if REFBUFEN grounded."
},
{
"number": "23",
"name": "SDR/DDR",
"type": "input",
"description": "Double data rate input; controls frequency of SCK and CLKOUT; tie to GND for SDR mode or to OVDD for DDR mode; CLKOUT is delayed version of SCK for both states."
},
{
"number": "24",
"name": "CNV",
"type": "input",
"description": "Convert input; when high defines acquisition phase; when low initiates conversion and output data readout; must be driven at OVDD levels with low jitter pulse."
},
{
"number": "25",
"name": "CMOS/LVDS",
"type": "input",
"description": "I/O mode select; ground for CMOS mode, tie to OVDD for LVDS mode, float for low power LVDS mode."
},
{
"number": "26",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "27",
"name": "SDO1",
"type": "output",
"description": "CMOS serial data output for ADC channel 1; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "28",
"name": "SDO2",
"type": "output",
"description": "CMOS serial data output for ADC channel 2; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "29",
"name": "SDO3",
"type": "output",
"description": "CMOS serial data output for ADC channel 3; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "30",
"name": "SDO4",
"type": "output",
"description": "CMOS serial data output for ADC channel 4; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "31",
"name": "OVDD",
"type": "power_in",
"description": "I/O interface digital power supply (1.71V to 2.63V range); nominally 1.8V or 2.5V for CMOS, 2.5V for LVDS; bypass to GND with 0.1µF capacitor."
},
{
"number": "32",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "33",
"name": "CLKOUT",
"type": "output",
"description": "Serial data clock output; provides skew-matched clock to latch SDO output at receiver; echoes SCK input with small delay; logic level determined by OVDD."
},
{
"number": "34",
"name": "CLKOUTEN",
"type": "input",
"description": "CLKOUT enable control; tie to OVDD to disable CLKOUT for small power savings; ground this pin if CLKOUT is used."
},
{
"number": "35",
"name": "SDO5",
"type": "output",
"description": "CMOS serial data output for ADC channel 5; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "36",
"name": "SDO6",
"type": "output",
"description": "CMOS serial data output for ADC channel 6; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "37",
"name": "OVDD",
"type": "power_in",
"description": "I/O interface digital power supply (1.71V to 2.63V range); nominally 1.8V or 2.5V for CMOS, 2.5V for LVDS; bypass to GND with 0.1µF capacitor."
},
{
"number": "38",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "39",
"name": "SDO7",
"type": "output",
"description": "CMOS serial data output for ADC channel 7; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "40",
"name": "SDO8",
"type": "output",
"description": "CMOS serial data output for ADC channel 8; conversion result shifted MSB first on falling edge of SCK in SDR mode or each SCK edge in DDR mode; 16 SCK edges required for 14-bit data."
},
{
"number": "41",
"name": "SCK",
"type": "input",
"description": "Serial data clock input; falling edge shifts conversion result MSB first in SDR mode; each edge in DDR mode; logic level determined by OVDD; 100MHz for SDR or 50MHz for DDR at 1.5Msps."
},
{
"number": "42",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect this pin in CMOS mode."
},
{
"number": "43",
"name": "REFBUFEN",
"type": "input",
"description": "Reference buffer output enable; tie to VDD when using internal reference; tie to ground to disable internal REFOUT1-4 buffers for external references; has 500kΩ internal pull-up to VDD."
},
{
"number": "44",
"name": "VDD",
"type": "power_in",
"description": "Power supply (3.3V or 5V); bypass to GND with 10µF and 0.1µF ceramic capacitors close to the part; VDD pins must be shorted together and driven from same supply."
},
{
"number": "45",
"name": "REFOUT4",
"type": "output",
"description": "Reference buffer 4 output; nominally outputs 4.096V; decouple with 10µF ceramic capacitor to GND; can be overdriven with external reference 1.25V to 5V if REFBUFEN grounded."
},
{
"number": "46",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "47",
"name": "AIN8–",
"type": "input",
"description": "Analog differential input pin for channel 8; full-scale range (AIN8+ - AIN8-) is ±REFOUT4 voltage; can be driven from VDD to GND."
},
{
"number": "48",
"name": "AIN8+",
"type": "input",
"description": "Analog differential input pin for channel 8; full-scale range (AIN8+ - AIN8-) is ±REFOUT4 voltage; can be driven from VDD to GND."
},
{
"number": "49",
"name": "GND",
"type": "power_in",
"description": "Ground; must be tied directly to a solid ground plane."
},
{
"number": "50",
"name": "AIN7–",
"type": "input",
"description": "Analog differential input pin for channel 7; full-scale range (AIN7+ - AIN7-) is ±REFOUT4 voltage; can be driven from VDD to GND."
},
{
"number": "51",
"name": "AIN7+",
"type": "input",
"description": "Analog differential input pin for channel 7; full-scale range (AIN7+ - AIN7-) is ±REFOUT4 voltage; can be driven from VDD to GND."
},
{
"number": "52",
"name": "VDD",
"type": "power_in",
"description": "Power supply (3.3V or 5V); bypass to GND with 10µF and 0.1µF ceramic capacitors close to the part; VDD pins must be shorted together and driven from same supply."
},
{
"number": "53",
"name": "GND",
"type": "power_in",
"description": "Exposed pad ground; must be soldered to PCB ground plane."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pins 27–30, 33–34, 35–36, 39–42 have dual functionality: documented as CMOS mode (SDO1–8, CLKOUT, CL; Pin 34 (CLKOUTEN in CMOS mode) functions as CLKOUT– (differential output) in LVDS mode, changing fro; Pin 42 (DNC in CMOS mode) functions as SCK– (differential input) in LVDS mode, changing from unconne"
],
"pages_sent": 34,
"cost_usd": 0.8183,
"at": "2026-09-17T17:13:12"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885897483849728",
"pages": 34,
"sha256": "321752c03d0fedaf",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 53,
"described": 53,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
8.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d4f1468a45c05c81edbcd13f9a84c9aef0215f6814f1f9df58200c3bfed0d530",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ltc2320iukg-14-pbf-etched.step",
"role": "eda",
"up": "Z",
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"footprint_binding": "identity",
"sha256": "150bce2a3422cc43c8450def5533d617a396e4b172ef9a0d1aab6cc68883bb9b",
"checked": "2026-10-16",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "QFN-52-EP(7x8)",
"Category": "ADC/DAC/Data Conversion",
"Pins": "53"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
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"info"
],
"discovery_triggers": [
"ltc2320iukg-14#pbf"
],
"discovery_pitch": "LTC2320IUKG-14#PBF (Analog Devices) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
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"path": "docs/hero.png"
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"files": [
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"updated_at": "2026-09-28T18:13:58.523Z"
}