component
LTA6042XS8
Public Made by Adomby adom
Linearin(先积集成) Operational Amplifier, SOIC-8L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTA6042XS8
Linearin(先积集成) · Operational Amplifier · SOIC-8L
LTA6042XS8 from Linearin(先积集成), in a SOIC-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input, voltage range from VS- - 0.2V to VS+ - 1V. |
| 3 | +INA | input | Amplifier A non-inverting input, same voltage range as -IN (VS- - 0.2V to VS+ - 1V). |
| 4 | -VS | power_in | Negative power supply, normally tied to ground; total VS+ to VS- must be 2.5V to 12.6V. |
| 5 | +INB | input | Amplifier B non-inverting input, same voltage range as -IN (VS- - 0.2V to VS+ - 1V). |
| 6 | -INB | input | Amplifier B inverting input, voltage range from VS- - 0.2V to VS+ - 1V. |
| 7 | OUTB | output | Amplifier B output. |
| 8 | +VS | power_in | Positive power supply, 2.5V to 12.6V between VS+ and VS-; split supplies possible within that span. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin(先积集成) |
| Package | SOIC-8L |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VS+ to VS- | 13.5 | V | 2 | ||||
| Signal input terminals voltage | -0.5 | 0.5 | V | Referenced to supply rails: −VS − 0.5 V to +VS + 0.5 V | 2 | ||
| Signal input terminals current | -10 | 10 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 2 | ||
| Junction temperature | TJ | 150 | ℃ | 2 | |||
| Lead temperature range | 260 | ℃ | Soldering 10 sec | 2 | |||
| ESD Human body model (HBM) | -4000 | 4000 | V | MIL-STD-883J / Method 3015.9 | 2 | ||
| ESD Charged device model (CDM) | -2000 | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 | ||
| Operating supply range | VS | 2.5 | 12.6 | V | 4 | ||
| Operating temperature range | TA | -40 | 125 | ℃ | Other packages (SOIC-8L) | 6 | |
| Input offset voltage | VOS | -15 | 6 | 15 | mV | LTA6041, LTA6042; VS = 3 V, TA = +25 ℃, VCM = VO = VS/2, RL = 2 kΩ to VS/2 | 3 |
| Offset voltage drift | VOS TC | -5 | 5 | μV/℃ | TA = −40 to +125 ℃ | 3 | |
| Common-mode voltage range | VCM | -0.2 | 2 | V | CMRR ≥ 50dB | 3 | |
| Output current | IOUT | -75 | 75 | mA | VOUT = 0.5V from either supply | 3 | |
| Short-circuit current | ISC | -110 | 110 | mA | 3 | ||
| Input bias current | IB | 0.05 | nA | 3 | |||
| Input bias current | IB | 4 | nA | TA = +125 ℃ | 3 | ||
| Input offset current | IOS | 70 | pA | 3 | |||
| Open-loop voltage gain | AVOL | 96 | dB | RL = 2kΩ to VS/2, VO = 0.5V to 2.5V | 3 | ||
| Open-loop voltage gain | AVOL | 82 | dB | RL = 150Ω to VS/2, VO = 0.5V to 2.5V | 3 | ||
| Input resistance | RIN | 1 | GΩ | Common mode | 3 | ||
| Input capacitance | CIN | 2 | pF | Common mode | 3 | ||
| Common-mode rejection ratio | CMRR | 95 | dB | VCM = 0V to 1.5 V | 3 | ||
| High output voltage swing | VOH | 2.99 | V | RL = 2kΩ to VS/2 | 3 | ||
| High output voltage swing | VOH | 2.93 | V | RL = 150Ω to VS/2 | 3 | ||
| Low output voltage swing | VOL | 15 | mV | RL = 2kΩ to VS/2 | 3 | ||
| Low output voltage swing | VOL | 65 | mV | RL = 150Ω to VS/2 | 3 | ||
| Capacitive load drive | CLOAD | 40 | pF | G = +2 | 3 | ||
| Quiescent current per amplifier | IQ | 4.1 | mA | 4 | |||
| Power supply rejection ratio | PSRR | 85 | dB | VS = 3.0 to 3.5 V, VCM = 1.5V | 4 | ||
| Thermal resistance, junction to ambient (SOIC-8L) | θJA | 125 | ℃/W | SOIC-8L | 6 |
CAD (KiCad official)
- Symbol:
LTA6042XS8 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8L (KiCad packages3D, STEP)
- 3D model files:
lta6042xs8-etched.step/lta6042xs8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lta6042xs8.step/lta6042xs8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Linearin(先积集成) datasheet (13 pp, sha256
ef4a0f9b0399cb27, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTA6042XS8
**Linearin(先积集成)** · Operational Amplifier · SOIC-8L
LTA6042XS8 from Linearin(先积集成), in a SOIC-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input, voltage range from VS- - 0.2V to VS+ - 1V. |
| 3 | +INA | input | Amplifier A non-inverting input, same voltage range as -IN (VS- - 0.2V to VS+ - 1V). |
| 4 | -VS | power_in | Negative power supply, normally tied to ground; total VS+ to VS- must be 2.5V to 12.6V. |
| 5 | +INB | input | Amplifier B non-inverting input, same voltage range as -IN (VS- - 0.2V to VS+ - 1V). |
| 6 | -INB | input | Amplifier B inverting input, voltage range from VS- - 0.2V to VS+ - 1V. |
| 7 | OUTB | output | Amplifier B output. |
| 8 | +VS | power_in | Positive power supply, 2.5V to 12.6V between VS+ and VS-; split supplies possible within that span. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin(先积集成) |
| Package | SOIC-8L |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VS+ to VS- | | | | 13.5 | V | | 2 |
| Signal input terminals voltage | | -0.5 | | 0.5 | V | Referenced to supply rails: −VS − 0.5 V to +VS + 0.5 V | 2 |
| Signal input terminals current | | -10 | | 10 | mA | | 2 |
| Storage temperature range | Tstg | -65 | | 150 | ℃ | | 2 |
| Junction temperature | TJ | | | 150 | ℃ | | 2 |
| Lead temperature range | | | | 260 | ℃ | Soldering 10 sec | 2 |
| ESD Human body model (HBM) | | -4000 | | 4000 | V | MIL-STD-883J / Method 3015.9 | 2 |
| ESD Charged device model (CDM) | | -2000 | | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 |
| Operating supply range | VS | 2.5 | | 12.6 | V | | 4 |
| Operating temperature range | TA | -40 | | 125 | ℃ | Other packages (SOIC-8L) | 6 |
| Input offset voltage | VOS | -15 | 6 | 15 | mV | LTA6041, LTA6042; VS = 3 V, TA = +25 ℃, VCM = VO = VS/2, RL = 2 kΩ to VS/2 | 3 |
| Offset voltage drift | VOS TC | -5 | | 5 | μV/℃ | TA = −40 to +125 ℃ | 3 |
| Common-mode voltage range | VCM | -0.2 | | 2 | V | CMRR ≥ 50dB | 3 |
| Output current | IOUT | -75 | | 75 | mA | VOUT = 0.5V from either supply | 3 |
| Short-circuit current | ISC | -110 | | 110 | mA | | 3 |
| Input bias current | IB | | 0.05 | | nA | | 3 |
| Input bias current | IB | | 4 | | nA | TA = +125 ℃ | 3 |
| Input offset current | IOS | | 70 | | pA | | 3 |
| Open-loop voltage gain | AVOL | | 96 | | dB | RL = 2kΩ to VS/2, VO = 0.5V to 2.5V | 3 |
| Open-loop voltage gain | AVOL | | 82 | | dB | RL = 150Ω to VS/2, VO = 0.5V to 2.5V | 3 |
| Input resistance | RIN | | 1 | | GΩ | Common mode | 3 |
| Input capacitance | CIN | | 2 | | pF | Common mode | 3 |
| Common-mode rejection ratio | CMRR | | 95 | | dB | VCM = 0V to 1.5 V | 3 |
| High output voltage swing | VOH | | 2.99 | | V | RL = 2kΩ to VS/2 | 3 |
| High output voltage swing | VOH | | 2.93 | | V | RL = 150Ω to VS/2 | 3 |
| Low output voltage swing | VOL | | 15 | | mV | RL = 2kΩ to VS/2 | 3 |
| Low output voltage swing | VOL | | 65 | | mV | RL = 150Ω to VS/2 | 3 |
| Capacitive load drive | CLOAD | | 40 | | pF | G = +2 | 3 |
| Quiescent current per amplifier | IQ | | 4.1 | | mA | | 4 |
| Power supply rejection ratio | PSRR | | 85 | | dB | VS = 3.0 to 3.5 V, VCM = 1.5V | 4 |
| Thermal resistance, junction to ambient (SOIC-8L) | θJA | | 125 | | ℃/W | SOIC-8L | 6 |
## CAD (KiCad official)
- Symbol: `LTA6042XS8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8L (KiCad packages3D, STEP)
- 3D model files: `lta6042xs8-etched.step` / `lta6042xs8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lta6042xs8.step` / `lta6042xs8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Linearin(先积集成) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602897061872889856) (13 pp, sha256 `ef4a0f9b0399cb27`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lta6042xs8-datasheet.pdf)