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LT8618EDDB#TRPBF

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Analog Devices DC-DC Converters, DFN-10(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LT8618EDDB#TRPBF

Analog Devices · DC-DC Converters · DFN-10(2x3)

LT8618EDDB#TRPBF from Analog Devices, in a DFN-10(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BST power_out Supplies a drive voltage higher than VIN to the topside power switch; place a 47nF boost capacitor as close as possible to the IC and do not put resistance in series with this pin.
2 SW power_out Output of the internal power switches that connects to the inductor, and this node should be kept small on the PCB for good performance.
3 BIAS input The internal regulator draws current from BIAS instead of VIN when BIAS is above 3.2V; for outputs of 3.3V to 25V it should be tied to VOUT, a 1µF bypass is needed if another supply is used, and it should be tied to GND if no supply is available.
4 INTVCC power_out Internal 3.4V regulator bypass pin with a maximum output current of 2mA that must not be loaded externally, and it needs at least 1µF of low-ESR ceramic decoupling placed close to the IC.
5 RT passive A resistor between RT and ground sets the switching frequency.
6 FB input For the LT8618 this is the feedback input where the feedback resistor divider tap connects, and the part regulates FB to 0.778V.
7 TR/SS bidirectional Output tracking and soft-start pin where a voltage below 0.778V makes FB follow TR/SS, an internal 2µA pull-up sets the output ramp with a capacitor, and a 300Ω pull-down is active during shutdown and fault so a series resistor is needed if driven from a low-impedance output.
8 PG output Open-drain power-good output that stays low until FB is within ±7.5% of the regulation voltage with no fault conditions, and it is valid when VIN is above 3.4V regardless of EN/UV state.
9 EN/UV input The part is shut down when this pin is low and active when high, with a hysteretic threshold of 1.05V rising and 1.00V falling; tie it to VIN if shutdown is not used, and an external resistor divider from VIN can set a UVLO threshold.
10 VIN power_in Supplies the internal circuitry and top-side power switch and must be locally bypassed with the input capacitor's positive terminal as close as possible to VIN, rated 3.4V to 60V operating (65V maximum for transients).
11 GND power_in Exposed pad ground that must be connected to the negative terminal of the input capacitor and soldered to the PCB to lower the thermal resistance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-10(2x3)
Category Power Management (PMIC)
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage 3.4 60 V 3
Minimum Input Voltage 2.9 3.4 V Note 5 3
VIN Quiescent Current 1 4 µA VEN/UV = 0V 3
VIN Quiescent Current 1.7 12 µA VEN/UV = 2V, Not Switching 3
LT8618 Feedback Reference Voltage VFB 0.762 0.778 0.798 V VIN = 12V, ILOAD = 100µA 3
FB/OUT Voltage Line Regulation -0.06 0.02 0.06 %/V VIN = 4V to 60V 3
LT8618 FB Pin Input Current IFB -20 20 nA VFB = 0.8V 3
Minimum On-Time 35 65 ns 3
Minimum Off-Time 90 120 ns 3
Oscillator Frequency fSW 140 200 260 kHz RT = 221k 3
Oscillator Frequency fSW 1.85 2 2.15 MHz RT = 18.2k, LT8618/LT8618-3.3/LT8618C 3
Top Power NMOS Current Limit 150 200 250 mA 3
SW Leakage Current 15 µA VIN = 48V 3
EN/UV Pin Threshold 0.98 1.05 1.11 V Pin Voltage Rising 3
EN/UV Pin Current -50 50 nA VEN/UV = 2V 3
PG Upper Threshold Offset from VFB/OUT 5 7.5 10 % VFB/OUT Rising, LT8618/LT8618-3.3 4
PG Lower Threshold Offset from VFB/OUT -10 -7.5 -5 % VFB/OUT Falling, LT8618/LT8618-3.3/LT8618C 4
PG Leakage -200 200 nA VPG = 42V 4
PG Pull-Down Resistance 550 1200 Ω VPG = 0.1V 4
TR/SS Source Current 1 2 3.5 µA VTR/SS = 0.1V, E- and I-Grades 4
TR/SS Pull-Down Resistance 300 900 Ω Fault Condition, VTR/SS = 0.1V 4
VIN Pin Voltage VIN, VEN/UV -0.3 65 V Note 4: 65V transients, 60V continuous operation 2
PG Voltage VPG -0.3 42 V 2
BIAS Voltage VBIAS -0.3 25 V 2
FB and TR/SS Voltages VFB, VTR/SS -0.3 4 V FB (LT8618/LT8618C), TR/SS 2
Operating Junction Temperature Range TJ -40 125 °C LT8618E/LT8618E-3.3 2
Storage Temperature Range TSTG -65 150 °C 2
Thermal Resistance Junction-to-Ambient θJA 76 °C/W DDB 10-lead (3mm × 2mm) DFN 2
Thermal Resistance Junction-to-Case θJC 13.5 °C/W DDB 10-lead (3mm × 2mm) DFN 2

CAD (KiCad official)

  • Symbol: LT8618EDDB#TRPBF
  • Footprint: Package_DFN_QFN:DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm
  • 3D model: DFN-10(2x3) (KiCad packages3D, STEP)
  • 3D model files: lt8618eddb-trpbf-etched.step / lt8618eddb-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt8618eddb-trpbf.step / lt8618eddb-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (29 pp, sha256 4bd6ffbba1021846, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF