component
LT8355IUFDM-1#WTRPBF
Public Made by Adomby adom
ANALOG DEVICES Global Sourcing Parts, QFN-28(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LT8355IUFDM-1#WTRPBF
ANALOG DEVICES · Global Sourcing Parts · QFN-28(4x5)
LT8355IUFDM-1#WTRPBF from ANALOG DEVICES, in a QFN-28(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWMTG1 | output | High side gate driver for the external series PMOS switch of channel 1, driving the gate between ISP1 - 8.5V and ISP1 and limited to 8.5V typical below ISP1. |
| 2 | ISN1 | input | Kelvin connect to the low side of the channel 1 LED current sense resistor RILED1; current is 250mV/RILED1 while CTRL1 is above 1.5V. |
| 3 | ISP1 | input | Kelvin connect to the high side of the channel 1 LED current sense resistor; if VISP - VISN exceeds about 670mV typical, switching stops and PWMTG1 goes high. |
| 4 | FB1 | input | Channel 1 output voltage feedback from a resistive divider; regulates to about 1.2V typical, overvoltage at 1.26V typical, and shorted LED detected below 300mV typical. |
| 5 | VC1 | passive | Internal error amplifier compensation node for channel 1; connect a capacitor or RC network between this pin and ground. |
| 6 | CTRL1 | input | Analog dimming input for channel 1; LED current is (CTRL1 - 500mV)/(4RILED1) when CTRL1 is between 500mV and 1.5V. |
| 7 | FAULT1 | output | Open-drain fault indication for channel 1 short LED, open LED, overvoltage and overcurrent faults; tie through 100k to INTVCC or a supply below 15V. |
| 8 | CTRL2 | input | Analog dimming input for channel 2 used with IADJ2; current is [(CTRL2 - 0.48V) x (IADJ2 - 0.5V) - 0.02V]/(4RILED2) when CTRL2 and IADJ2 are between 0.5V and 1.5V. |
| 9 | IADJ2 | input | Analog dimming multiplier input for channel 2; tie to VREF or INTVCC for full-scale current, and keep between 0.5V and 1.5V for linear programming. |
| 10 | PWM1 | input | PWM dimming control for channel 1; 0.5V to 1.5V selects internal exponential duty ratio, external PWM requires ON above 1.6V and OFF below 0.4V. |
| 11 | PWM2 | input | PWM dimming control for channel 2; 0.5V to 1.5V selects internal exponential duty ratio, external PWM requires ON above 1.6V and OFF below 0.4V. |
| 12 | RT | passive | Connect only a resistor to ground to set the switching frequency and PWM dimming frequency; other connections may stop correct operation. |
| 13 | FAULT2 | output | Open-drain fault indication for channel 2 short LED, open LED, overvoltage and overcurrent faults; pulled low on any reported fault and must not exceed 15V. |
| 14 | VREF | power_out | 2V typical reference supplying up to 2.5mA at room temperature; bypass with 1uF if needed and leave floating if unused. |
| 15 | EN/UVLO | input | Enable and programmable UVLO input; switching stops below 1.25V typical, logic high above 1.4V and low below 0.3V, absolute maximum 62V. |
| 16 | VIN | power_in | Input supply pin with 5V to 60V operating range and absolute maximum 62V; must be locally bypassed. |
| 17 | VC2 | passive | Internal error amplifier compensation node for channel 2; connect a capacitor or RC network between this pin and ground. |
| 18 | FB2 | input | Channel 2 output voltage feedback from a resistive divider; regulates to about 1.2V typical, overvoltage at 1.26V typical, and shorted LED detected below 300mV typical. |
| 19 | ISP2 | input | Kelvin connect to the high side of the channel 2 LED current sense resistor; if VISP - VISN exceeds about 670mV typical, switching stops and PWMTG2 goes high. |
| 20 | ISN2 | input | Kelvin connect to the low side of the channel 2 LED current sense resistor RILED2; current is 250mV/RILED2 while CTRL2 and IADJ2 are above 1.5V. |
| 21 | PWMTG2 | output | High side gate driver for the external series PMOS switch of channel 2, limited to 8.5V typical below ISP2. |
| 22 | INTVCC | power_out | Internal supply regulated to 7.5V typical; requires at least 2.2uF to ground with 4.7uF recommended and is not intended to power external loads. |
| 23 | GATE2 | output | External NMOS power switch gate driver for channel 2, connected to the gate of an NMOS whose source is at the switch current sense resistor. |
| 24 | SENSEP2 | input | Kelvin connect to the positive side of the grounded switch current sense resistor for channel 2. |
| 25 | SENSEN2 | input | Kelvin connect to the negative side of the switch current sense resistor for channel 2. |
| 26 | SENSEN1 | input | Kelvin connect to the negative side of the switch current sense resistor for channel 1. |
| 27 | SENSEP1 | input | Kelvin connect to the positive side of the grounded switch current sense resistor for channel 1. |
| 28 | GATE1 | output | External NMOS power switch gate driver for channel 1, connected to the gate of an NMOS whose source is at the switch current sense resistor. |
| 29 | GND | power_in | Exposed pad ground that must be soldered directly to the ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ANALOG DEVICES |
| Package | QFN-28(4x5) |
| Category | Global Sourcing Parts |
| Pins | 29 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ISP and ISN absolute maximum | ISP, ISN | 120 | V | 2 | |||
| ISP-ISN differential absolute maximum | ISP1, ISN1, ISP2, ISN2 | -1 | 1 | V | Note 9 | 2 | |
| CTRL and FB absolute maximum | CTRL1, CTRL2, FB1, FB2 | 15 | V | 2 | |||
| FAULT, IADJ2 and PWM absolute maximum | FAULT1, FAULT2, IADJ2, PWM1, PWM2 | 15 | V | 2 | |||
| INTVCC absolute maximum | INTVCC | 8 | V | Also VIN + 0.3V | 2 | ||
| SENSEP and SENSEN absolute maximum | SENSEP1, SENSEN1, SENSEP2, SENSEN2 | -0.5 | 0.5 | V | 2 | ||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Operating junction temperature range | -40 | 125 | °C | LT8355I-1 (Notes 3, 4) | 2 | ||
| Operating supply range | VIN | 5 | 60 | V | 2 | ||
| Input (VIN) quiescent current | IQ | 3 | mA | PWM1,2 = 0V | 2 | ||
| Input (VIN) shutdown current | 0.1 | 1 | µA | EN/UVLO = 0.3V | 2 | ||
| Input (VIN) shutdown current | 12 | 20 | µA | EN/UVLO = 1.1V, EN/UVLO Rising | 2 | ||
| EN/UVLO shutdown threshold | 1.15 | 1.25 | 1.35 | V | EN/UVLO Falling | 2 | |
| INTVCC regulation voltage | INTVCC | 7.35 | 7.5 | 7.65 | V | PWM1,2 = 0V, IINTVCC = 1mA, 12V < VIN < 60V | 3 |
| INTVCC line regulation | 0.75 | 3 | mV/V | PWM1,2 = 0V, 10 < VIN < 60V | 3 | ||
| INTVCC load regulation | 2.25 | 4.5 | mV/mA | PWM1,2 = 0V, 1mA < IINTVCC < 30mA | 3 | ||
| INTVCC current limit | 110 | 140 | 170 | mA | PWM1,2 = 0V, VIN = 12V, INTVCC = 7V | 3 | |
| INTVCC current limit | 30 | 45 | 60 | mA | PWM1,2 = 0V, VIN = 60V, INTVCC = 7V | 3 | |
| INTVCC dropout voltage | 250 | mV | PWM1,2 = 0V, VIN = 5V, ILOAD = 10mA | 3 | |||
| VREF voltage | VREF | 1.97 | 2 | 2.02 | V | IVREF = 0.5mA | 3 |
| VREF load regulation | 5 | 8 | mV/mA | IVREF = 0.1mA to 1mA | 3 | ||
| VREF current limit | 2.5 | 3.2 | 4 | mA | VREF = 1.8V | 3 | |
| ISP, ISN common mode voltage range | 0 | 110 | V | 3 | |||
| LED current sense threshold (VISP, VISN) | 245 | 250 | 255 | mV | CTRL1,2 = 2V, IADJ2 = 2V (100%), ISP1,2 = 100V | 3 | |
| LED current sense threshold (VISP, VISN) | 120 | 125 | 130 | mV | CTRL1,2 = 1V, IADJ2 = 2V (50%), ISP1,2 = 100V | 3 | |
| LED current sense threshold (VISP, VISN) | 20 | 25 | 30 | mV | CTRL1,2 = 0.6V, IADJ2 = 2V (10%), ISP1,2 = 100V | 3 | |
| LED current sense threshold (VISP, VISN) | 240 | 250 | 260 | mV | CTRL1,2 = 2V, IADJ2 = 2V (100%), ISN1,2 = 0V | 3 | |
| LED2 current sense threshold (VISP2, VISN2) | 118 | 125 | 134 | mV | CTRL2 = 2V, IADJ2 = 1V (50%), ISP = 100V | 3 | |
| SENSE current limit threshold (SENSEP, SENSEN) | 95 | 108 | 120 | mV | 50% Duty Cycle at GATE | 3 | |
| CTRL off threshold (falling) | 285 | 310 | 335 | mV | 3 | ||
| CTRL pin current | 20 | nA | Current out of pin, CTRL1,2 = 0 | 3 | |||
| ISP, ISN pin current (combined, active) | 600 | µA | PWM1,2 = INTVCC, ISP1,2 = 100V (Active) | 3 | |||
| FB regulation voltage (VFB) | VFB | 1.182 | 1.2 | 1.218 | V | CTRL1,2 = 2V, IADJ2 = 2V | 3 |
| FB regulation voltage (VFB) | VFB | 1.176 | 1.2 | 1.224 | V | CTRL1,2 = 2V, IADJ2 = 2V, l (full operating temperature range) | 3 |
| Programmed switching frequency (fSW1, Channel 1) | fSW1 | 1800 | 1950 | 2100 | kHz | RT = 9.09kΩ | 3 |
| Programmed switching frequency (fSW1, Channel 1) | fSW1 | 380 | 400 | 420 | kHz | RT = 51.1kΩ | 3 |
| Programmed switching frequency (fSW1, Channel 1) | fSW1 | 96 | 102 | 108 | kHz | RT = 215kΩ | 3 |
| Minimum off-time | 30 | 60 | 85 | ns | RT = 9.09kΩ | 3 | |
| Minimum off-time | 75 | 120 | 165 | ns | RT = 51.1kΩ | 3 | |
| Minimum off-time | 100 | 170 | 240 | ns | RT = 215kΩ | 3 | |
| Minimum on-time | 100 | ns | CGATE1,2 = 3.3nF | 4 | |||
| PWMTG ON voltage (VISP, VPWMTG) | 7.5 | 8.5 | 9.5 | V | VISP1,2 = 100V | 4 | |
| PWMTG OFF voltage (VISP, VPWMTG) | 0 | 0.3 | V | VISP1,2 = 100V | 4 | ||
| FB LED open threshold | 1.116 | 1.14 | 1.164 | V | VISP1,2 = VISN1,2, FB Rising | 4 | |
| FB overvoltage threshold | 1.235 | 1.26 | 1.285 | V | FB1,2 Rising | 4 | |
| FB shorted LED threshold | 300 | 330 | mV | FB1,2 Falling | 4 | ||
| LED overcurrent protection threshold (VISP, VISN) | 580 | 670 | 760 | mV | 4 | ||
| FAULT pin pull down current | 0.5 | mA | VFAULT1-2 = 0.3V, VFB1,2 = 1.3V | 4 | |||
| PWM pin voltage for max duty ratio | 1.5 | V | 4 | ||||
| PWM pin voltage for min duty ratio | 0.5 | V | 4 | ||||
| PWM off threshold (falling) | 0.4 | V | 4 | ||||
| PWM on threshold (rising) | 1.6 | V | 4 | ||||
| Minimum duty ratio | 0.78 | % | VPWM1,2 = 0.5V, RT = 51.1kΩ | 4 | |||
| Maximum duty ratio | 100 | % | VPWM1,2 = 1.5V, RT = 51.1kΩ | 4 | |||
| EN/UVLO rising hysteresis | 60 | mV | EN/UVLO Rising | 2 | |||
| EN/UVLO pin current (device off) | 2.4 | µA | EN/UVLO = 1.1V, EN/UVLO Rising | 2 | |||
| EN/UVLO pin current (device on) | 0 | µA | EN/UVLO = 1.35V | 2 | |||
| INTVCC undervoltage lockout threshold | 4.3 | V | PWM1,2 = 0V, INTVCC Falling | 3 | |||
| Error amp transconductance | gm | 65 | µS | CTRL1,2 = 2V, IADJ2 = 2V (Full-Scale) | 3 | ||
| FB amplifier transconductance | 380 | µS | 3 | ||||
| Thermal resistance, junction to ambient | θJA | 43 | °C/W | 28-lead 4mm × 5mm side-solderable QFN (UFDM package) | 2 | ||
| Thermal resistance, junction to case | θJC | 3.4 | °C/W | 28-lead 4mm × 5mm side-solderable QFN (UFDM package) | 2 |
CAD (KiCad official)
- Symbol:
LT8355IUFDM-1#WTRPBF - Footprint:
Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm - 3D model: QFN-28(4x5) (KiCad packages3D, STEP)
- 3D model files:
lt8355iufdm-1-wtrpbf-etched.step/lt8355iufdm-1-wtrpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt8355iufdm-1-wtrpbf.step/lt8355iufdm-1-wtrpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ANALOG DEVICES datasheet (31 pp, sha256
e789002dd440f861, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).