component
LT8302IS8E-3#PBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLT8302IS8E-3#PBF
Analog Devices · DC-DC Converters · SOIC-8-EP
LT8302IS8E-3#PBF from Analog Devices, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN/UVLO | input | Pull below 0.3V to shut down the device; the accurate 1.214V threshold can program a VIN UVLO with 2.5µA hysteresis current, and tie to VIN if unused. |
| 2 | INTVCC | power_out | Internal 3V linear regulator output supplied from VIN; do not overdrive with an external supply and bypass locally with a minimum 1µF ceramic capacitor. |
| 3 | VIN | power_in | Input supply pin for internal circuitry and the reference for the RFB feedback circuit; bypass locally to ground with a capacitor. |
| 4 | GND | power_in | Ground reference pin; connect to the ground plane together with the exposed pad. |
| 5 | SW | output | Drain of the internal 65V, 3.6A DMOS power switch; minimize trace area at this pin to reduce EMI and voltage spikes. |
| 6 | RFB | input | Input for the external feedback resistor connected to the transformer primary; the RFB to RREF ratio sets the output voltage, and trace area should be minimized. |
| 7 | RREF | input | Input for an external ground-referred reference resistor, nominally 10k and usable from 9.09k to 11.0k. |
| 8 | TC | output | Proportional-to-absolute-temperature output at 3.35mV/°K, equal to 1V at 25°C; a resistor from TC to RREF compensates the output diode temperature coefficient. |
| 9 | GND | power_in | Exposed pad is ground and must be soldered directly to the ground plane for electrical and thermal contact. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Voltage Range | VIN | 3 | 42 | V | full operating temperature range | 3 | |
| VIN Quiescent Current (shutdown) | IQ | 0.5 | 2 | µA | VEN/UVLO = 0.2V | 3 | |
| VIN Quiescent Current (sleep mode) | IQ | 106 | µA | VEN/UVLO = 1.1V, Sleep Mode (Switch Off) | 3 | ||
| VIN Quiescent Current (active mode) | IQ | 380 | µA | VEN/UVLO = 1.1V, Active Mode (Switch On) | 3 | ||
| EN/UVLO Shutdown Threshold For Lowest Off IQ | 0.2 | 0.75 | V | full operating temperature range | 3 | ||
| EN/UVLO Enable Threshold Falling (E, I, H, MP Grades) | 1.178 | 1.214 | 1.25 | V | full operating temperature range | 3 | |
| EN/UVLO Enable Hysteresis | 14 | mV | 3 | ||||
| EN/UVLO Hysteresis Current | IHYS | -0.1 | 0 | 0.1 | µA | VEN/UVLO = 0.3V | 3 |
| EN/UVLO Hysteresis Current | IHYS | 2.3 | 2.5 | 2.7 | µA | VEN/UVLO = 1.1V | 3 |
| INTVCC Regulation Voltage | VINTVCC | 2.85 | 3 | 3.1 | V | IINTVCC = 0mA to 10mA | 3 |
| INTVCC Current Limit | IINTVCC | 10 | 13 | 20 | mA | VINTVCC = 2.8V | 3 |
| INTVCC UVLO Threshold Falling | 2.39 | 2.47 | 2.55 | V | 3 | ||
| INTVCC UVLO Hysteresis | 105 | mV | 3 | ||||
| (RFB, VIN) Voltage | -50 | 50 | mV | IRFB = 75µA to 125µA | 3 | ||
| RREF Regulation Voltage | 0.98 | 1 | 1.02 | V | full operating temperature range | 3 | |
| RREF Regulation Voltage Line Regulation | -0.01 | 0 | 0.01 | %/V | 3V ≤ VIN ≤ 42V | 3 | |
| TC Pin Voltage | VTC | 1 | V | 3 | |||
| TC Pin Current | ITC | 7 | 10 | 13 | µA | VTC = 1.2V (LT8302-3) | 3 |
| TC Pin Current | ITC | -200 | µA | VTC = 0.8V | 3 | ||
| Minimum Switching Frequency | fMIN | 11.3 | 12 | 12.7 | kHz | 3 | |
| Minimum Switch-On Time | tON(MIN) | 160 | ns | 3 | |||
| Maximum Switch-Off Time | tOFF(MAX) | 170 | µs | Backup Timer | 3 | ||
| Maximum Switch Current Limit | ISW(MAX) | 3.6 | 4.5 | 5.4 | A | 3 | |
| Minimum Switch Current Limit | ISW(MIN) | 0.7 | 0.87 | 1.04 | A | 3 | |
| Switch On-Resistance | RDS(ON) | 80 | mΩ | ISW = 1.5A | 3 | ||
| Switch Leakage Current | ILKG | 0.1 | 0.5 | µA | VSW = 65V | 3 | |
| Soft-Start Timer | tSS | 11 | ms | 3 | |||
| SW voltage | SW | 65 | V | Note 2 | 2 | ||
| VIN voltage | VIN | 42 | V | 2 | |||
| Current Into RFB | 200 | µA | 2 | ||||
| INTVCC, RREF, TC voltage | 4 | V | 2 | ||||
| Operating Junction Temperature Range (LT8302I-3) | TJ | -40 | 125 | °C | Notes 3, 4 | 2 | |
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 33 | °C/W | S8E package | 2 |
CAD (KiCad official)
- Symbol:
LT8302IS8E-3#PBF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lt8302is8e-3-pbf-etched.step/lt8302is8e-3-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt8302is8e-3-pbf.step/lt8302is8e-3-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
08515683bcc0fb0a, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).