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LT6372HMSE-0.2#PBF

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Analog Devices Instrumentation OpAmps, MSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatorlt6372hmse-0.2#pbffactory-2.0.0extractor-text

Verified LT6372HMSE-0.2#PBF

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 17 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT6372HMSE-0.2#PBF · MSOP-16-EP · 17 pins
  • ✓copper: 17 copper pads, none touching another net
  • ✓datasheet: all 17 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C4370676, digikey 505-LT6372HMSE-0.2#PBF-ND, mouser 584-6372HMSE-0.2#PBF
  • ✓family: MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-44ssykjp/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 17 pins = 17 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 17 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt6372hmse-0-2-pbf.kicad_sym✓ lt6372hmse-0-2-pbf.kicad_mod✓ lt6372hmse-0-2-pbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers lt6372hmse-0-2-pbf: viewers · Ray 4d ago
lt6372hmse-0-2-pbf-etched.glb Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf-etched.step lt6372hmse-0-2-pbf: factory component page (tier=mfr) · Ray 4d ago
lt6372hmse-0-2-pbf-hero.glb lt6372hmse-0-2-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
lt6372hmse-0-2-pbf-hero.overlay.json Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf.glb Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf.kicad_mod Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf.kicad_sym Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf.lbr Publish 0.1.0 · Ray 4d ago
lt6372hmse-0-2-pbf.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 17 pins · Ray 4d ago

LT6372HMSE-0.2#PBF

Analog Devices · Instrumentation OpAmps · MSOP-16-EP

LT6372HMSE-0.2#PBF from Analog Devices, in a MSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 -RG,F passive For use with an external gain setting resistor; route separately from -RG,S to minimize gain errors.
2 -RG,S passive For use with an external gain setting resistor; route separately from -RG,F to minimize gain errors.
3 NIC unconnected No internal connection.
4 -IN input Negative input terminal; this input is high impedance.
5 +IN input Positive input terminal; this input is high impedance.
6 NIC unconnected No internal connection.
7 CLLO input Low side clamp input that defines the lower output voltage limit, with the output typically clamping 500mV below the applied voltage; do not float.
8 V- power_in Negative power supply; a bypass capacitor should be used between supply pins and ground.
9 CLHI input High side clamp input that defines the upper output voltage limit, with the output typically clamping 500mV above the applied voltage; do not float.
10 REF1 input Reference for the output voltage; can be tied to REF2 or used with REF2 as a voltage divider to level shift the output.
11 OUTPUT output Output voltage referenced to the REF pins.
12 V+ power_in Positive power supply; a bypass capacitor should be used between supply pins and ground.
13 REF2 input Reference for the output voltage; can be tied to REF1 or used with REF1 as a voltage divider to level shift the output.
14 NIC unconnected No internal connection.
15 +RG,S passive For use with an external gain setting resistor; route separately from +RG,F to minimize gain errors.
16 +RG,F passive For use with an external gain setting resistor; route separately from +RG,S to minimize gain errors.
17 EXPOSED PAD passive Exposed pad must float or be connected to V+ in addition to pin 12.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-16-EP
Category Operational Amplifier/Comparator
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VS 4.75 35 V Guaranteed by PSRR 4
Operating and Specified Temperature Range (H-grade) TA -40 125 °C H-Grade 2
Total Supply Voltage (V+ to V-) 36 V 2
Differential Input Voltage (+IN to -IN) -36 36 V 2
Differential Input Voltage (REF1 to REF2) -8 8 V 2
Input Current (+RGS, +RGF, -RGS, -RGF) -2 2 mA 2
Input Current (+IN, -IN, CLLO) -10 10 mA 2
Output Current 80 mA 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C 10 sec soldering 2
Thermal Resistance Junction-to-Ambient (MSE package) θJA 35 °C/W 16-Lead Plastic MSOP 2
Gain Range G 0.2 200 V/V G = 0.2 • (1 + 24.2k/RG) (Note 2) 3
Gain Error 0.002 0.012 % G = 0.2 3
Gain vs Temperature 0.2 0.5 ppm/°C G = 0.2 (Note 5) 3
Gain vs Temperature 20 35 ppm/°C G > 0.2 (Note 6) 3
Input Offset Voltage VOSI 15 60 μV 3
Input Offset Voltage over temperature VOSI 175 μV l (over specified temperature range) 3
Output Offset Voltage VOSO 30 175 μV 3
Output Offset Voltage over temperature VOSO 300 μV l (over specified temperature range) 3
Input Offset Voltage Drift VOSI/T -0.6 0.6 μV/°C Notes 5, 8; l 3
Output Offset Voltage Drift VOSO/T -2 2 μV/°C Notes 5, 8; l 3
Input Bias Current IB 0.1 0.8 nA TA = -40°C to 85°C 3
Input Bias Current IB 1.5 3 nA TA = -40°C to 125°C 3
Input Offset Current IOS 0.2 1.4 nA l 3
Input Offset Current over temperature IOS 4 nA l 3
Input Resistance RIN 225 GΩ VIN = -12.6V to 13V 3
Common Mode Rejection Ratio DC to 60Hz CMRR 80 dB DC to 60Hz, 1k Source Imbalance, VCM = -12.6V to 13V, G = 0.2; l 4
AC Common Mode Rejection Ratio, MS16E Package CMRR 80 dB f = 20kHz, MS16E Package, G = 0.2 4
Supply Current IS 2.85 3.1 mA VS = ±15V, TA = -40°C to 125°C; l 4
Bandwidth -3dB BW 4 MHz G = 0.2 4
Slew Rate SR 3.5 V/μs G = 1, VOUT = ±2.5V 4
Settling Time tS 1.8 μs 4.096V Output Step to 0.0015%, G = 0.2 5
REF Input Resistance RREFIN 14 kΩ REF1 or REF2, Untested, REF pin floating 5
REF Gain to Output AVREF 0.5 V/V VREF1 = 0V to 5V, VREF2 = 0V 5
CLLO Input Current 1 μA VCLLO = 0V; l 5
CLHI Input Current 1 μA VCLHI = 5V; l 5
CLLO Clamp Voltage (VOUT - VCLLO) -0.74 -0.57 -0.45 V l 5
CLHI Clamp Voltage (VOUT - VCLHI) 0.45 0.55 0.755 V l 5

CAD (KiCad official)

  • Symbol: LT6372HMSE-0.2#PBF
  • Footprint: Package_SO:MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • 3D model: MSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lt6372hmse-0-2-pbf-etched.step / lt6372hmse-0-2-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt6372hmse-0-2-pbf.step / lt6372hmse-0-2-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 ae1a266ae04b6a77, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF