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LT6020IDD-1#PBF

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Analog Devices Operational Amplifier, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Contents

README

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LT6020IDD-1#PBF

Analog Devices · Operational Amplifier · DFN-10-EP(3x3)

LT6020IDD-1#PBF from Analog Devices, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Output of amplifier A, which swings close to both supply rails (VOL 130 mV and VOH 100 mV typical at RL = 10kΩ, 25°C).
2 -IN A input Inverting input of amplifier A; the input common mode range is V- + 1.2V to V+ - 1.4V.
3 +INA input Noninverting input of amplifier A; the input common mode range is V- + 1.2V to V+ - 1.4V.
4 V- power_in Negative power supply; a bypass capacitor should be used between the supply pins and ground.
5 DGND power_in Reference for the EN pin, normally tied to ground; it must be in the range V- to V+ - 3V, and cannot be floated.
6 EN input Active-high enable input referenced to DGND; it must be high (normally V+) for the amplifiers to operate, with the threshold about two diodes above DGND (≤0.8V to shut down, ≥1.7V to enable with VDGND = 0V), and it cannot be floated.
7 +INB input Noninverting input of amplifier B; the input common mode range is V- + 1.2V to V+ - 1.4V.
8 -IN B input Inverting input of amplifier B; the input common mode range is V- + 1.2V to V+ - 1.4V.
9 OUTB output Output of amplifier B, which swings close to both supply rails (VOL 130 mV and VOH 100 mV typical at RL = 10kΩ, 25°C).
10 V+ power_in Positive power supply, specified from 3V to 30V (36V absolute maximum total supply); a bypass capacitor should be used between the supply pins and ground.
11 EPAD power_in Exposed pad on the package bottom, connected to V- (pin 4); PCB connection is optional.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-10-EP(3x3)
Category Operational Amplifier/Comparator
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 20 70 µV DD packages; TA=25°C; VS=±15V 3
Input Offset Voltage VOS 110 µV DD packages; TA=-40 to 85°C; VS=±15V 3
Input Offset Voltage Drift ∆VOSI/∆Temp -0.8 0.3 0.8 µV/°C DD packages; VS=±15V 3
Input Bias Current IB -3 0.1 3 nA TA=25°C; VS=±15V 3
Input Bias Current IB -3 3 nA TA=-40 to 85°C; VS=±15V 3
Input Offset Current IOS -1 0.1 1 nA TA=25°C; VS=±15V 3
Input Offset Current IOS -1 1 nA TA=-40 to 85°C; VS=±15V 3
Common Mode Rejection Ratio CMRR 120 dB VCM=-13.8V to 13.6V; TA=-40 to 85°C 3
Supply Rejection Ratio PSRR 120 dB VS=3V to 30V; TA=-40 to 85°C 3
Large-Signal Voltage Gain AVOL 110 dB RL=6.98kΩ, VOUT=±14V; TA=-40 to 85°C 3
Large-Signal Voltage Gain AVOL 126 dB RL=100kΩ, VOUT=±14.5V; TA=-40 to 85°C 3
Output Swing Low (VOUT - V-) VOL 130 200 mV RL=10kΩ; TA=25°C; VS=±15V 3
Output Swing Low (VOUT - V-) VOL 250 mV RL=10kΩ; TA=-40 to 85°C; VS=±15V 3
Output Swing High (V+ - VOUT) VOH 100 140 mV RL=10kΩ; TA=25°C; VS=±15V 3
Output Swing High (V+ - VOUT) VOH 165 mV RL=10kΩ; TA=-40 to 85°C; VS=±15V 3
Short-Circuit Current, Sourcing ISC 5.5 mA VOUT=0V; TA=-40 to 85°C; VS=±15V 3
Short-Circuit Current, Sinking ISC 5.5 mA VOUT=0V; TA=-40 to 85°C; VS=±15V 3
Slew Rate SR 3 5 V/µs AVCL=1, 10V step; TA=25°C; VS=±15V 4
Slew Rate SR 2.4 V/µs AVCL=1, 10V step; TA=-40 to 85°C; VS=±15V 4
Slew Rate SR 1.4 2.4 V/µs AVCL=1, 5V step; TA=25°C; VS=±15V 4
Slew Rate SR 1.1 V/µs AVCL=1, 5V step; TA=-40 to 85°C; VS=±15V 4
Gain-Bandwidth Product GBW 290 400 kHz fO=10kHz 4
Minimum Supply Voltage 3 V Guaranteed by PSRR 4
Supply Current per Amplifier IS 90 100 µA TA=25°C; VS=±15V 4
Supply Current per Amplifier IS 125 µA TA=-40 to 85°C; VS=±15V 4
Supply Current in Shutdown IS 1.4 3 µA VEN=0.8V; TA=25°C; VS=±15V 4
Supply Current in Shutdown IS 3.2 µA VEN=0.8V; TA=-40 to 85°C; VS=±15V 4
DGND Pin Current IDGND -400 -200 nA 4
EN Pin Current IEN -200 -100 nA 4
EN Pin Input Low Voltage VENL 0.8 V Relative to DGND 4
EN Pin Input High Voltage VENH 1.7 V Relative to DGND 4
Input Offset Voltage VOS 20 100 µV DD packages; TA=25°C; VS=3V 5
Input Offset Voltage VOS 140 µV DD packages; TA=-40 to 85°C; VS=3V 5
Input Offset Voltage Drift ∆VOSI/∆Temp -0.8 0.3 0.8 µV/°C DD packages; VS=3V 5
Supply Rejection Ratio PSRR 120 dB VS=3V to 30V; TA=-40 to 85°C 5
Large-Signal Voltage Gain AVOL 98 dB RL=6.98kΩ, VOUT=0.5V to 2.5V; TA=-40 to 85°C; VS=3V 5
Output Swing Low (VOUT - V-) VOL 45 100 mV RL=10kΩ; TA=25°C; VS=3V 5
Output Swing Low (VOUT - V-) VOL 130 mV RL=10kΩ; TA=-40 to 85°C; VS=3V 5
Output Swing High (V+ - VOUT) VOH 55 80 mV RL=10kΩ; TA=25°C; VS=3V 5
Output Swing High (V+ - VOUT) VOH 90 mV RL=10kΩ; TA=-40 to 85°C; VS=3V 5
Short-Circuit Current, Sourcing ISC 3.5 mA VOUT=1.5V; TA=-40 to 85°C; VS=3V 5
Short-Circuit Current, Sinking ISC 5.5 mA VOUT=1.5V; TA=-40 to 85°C; VS=3V 5
Minimum Supply Voltage 3 V Guaranteed by PSRR 5
Supply Current per Amplifier IS 85 95 µA TA=25°C; VS=3V 6
Supply Current per Amplifier IS 120 µA TA=-40 to 85°C; VS=3V 6
Supply Current in Shutdown IS 0.9 1.1 µA VEN=0.8V; TA=25°C; VS=3V 6
Supply Current in Shutdown IS 1.5 µA VEN=0.8V; TA=-40 to 85°C; VS=3V 6
EN Pin Input Low Voltage VENL 0.8 V Relative to DGND; VS=3V 6
EN Pin Input High Voltage VENH 1.7 V Relative to DGND; VS=3V 6
Input Current (+IN, -IN, DGND, EN) -10 10 mA 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C 10 sec soldering 2
Operating and Specified Temperature Range (I-Grade) -40 85 °C I-grade 2
Thermal Resistance Junction-to-Ambient (DD10 package) θJA 43 °C/W DD10 (10-lead 3mm x 3mm DFN) package 2
Thermal Resistance Junction-to-Case (DD10 package) θJC 5.5 °C/W DD10 (10-lead 3mm x 3mm DFN) package 2

CAD (KiCad official)

  • Symbol: LT6020IDD-1#PBF
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: lt6020idd-1-pbf-etched.step / lt6020idd-1-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt6020idd-1-pbf.step / lt6020idd-1-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 b3bd8e02ee8d8454, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF