LT4275AIDD#TRPBF

{
  "slug": "lt4275aidd-trpbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Ethernet ICs, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "lt4275aidd#trpbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lt4275aidd-trpbf.kicad_sym",
    "lt4275aidd-trpbf.kicad_mod",
    "lt4275aidd-trpbf.glb",
    "lt4275aidd-trpbf.step",
    "lt4275aidd-trpbf.lbr",
    "docs/hero.png",
    "docs/lt4275aidd-trpbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt4275aidd-trpbf-hero.glb",
    "lt4275aidd-trpbf-hero.overlay.json",
    "lt4275aidd-trpbf-etched.glb"
  ],
  "component": {
    "mpn": "LT4275AIDD#TRPBF",
    "manufacturer": "Analog Devices",
    "package": "DFN-10-EP(3x3)",
    "pin_count": 11,
    "category": "Interface ICs",
    "subcategory": "Ethernet ICs",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/4275f.pdf",
    "parts": {
      "symbol": "lt4275aidd-trpbf.kicad_sym",
      "footprint": "lt4275aidd-trpbf.kicad_mod",
      "model_3d": "lt4275aidd-trpbf-hero.glb",
      "model_3d_plain": "lt4275aidd-trpbf-etched.glb",
      "model_3d_step": "lt4275aidd-trpbf-etched.step",
      "model_3d_step_plain": "lt4275aidd-trpbf.step",
      "lbr": "lt4275aidd-trpbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C672400",
      "digikey": "505-LT4275AIDD#TRPBFTR-ND",
      "mouser": "584-LT4275AIDD#TRPBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T09:27:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LT4275AIDD#TRPBFTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-LT4275AIDD#TRPBF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IEEEUVLO",
        "type": "input",
        "description": "Hot Swap turn-on threshold level control; connect to ground for IEEE compliant turn-on/turn-off UVLO thresholds, leave open for lower thresholds."
      },
      {
        "number": "2",
        "name": "AUX",
        "type": "input",
        "description": "Auxiliary sense input set via resistive divider (threshold VAUXT 6.3V typ); asserting it pulls down HSGATE, disconnects the signature resistor, disables classification and floats PWRGD, sinks IAUXH below threshold for hysteresis, tie to GND when not used."
      },
      {
        "number": "3",
        "name": "RCLASS",
        "type": "passive",
        "description": "Programmable PoE classification resistor pin, resistor to GND per Table 1 (float for class 0)."
      },
      {
        "number": "4",
        "name": "RCLASS++",
        "type": "passive",
        "description": "Programmable LTPoE++ classification resistor pin, used on the LT4275A (not connected on LT4275B/C), value per Table 1."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin, must be soldered to PCB GND."
      },
      {
        "number": "6",
        "name": "T2P",
        "type": "output",
        "description": "PSE type indicator open-drain output (LT4275A/B only); floats for 13W PSE, pulls down for 25.5W PSE, and toggles at fT2P (690-990Hz, ~50% duty) for an LTPoE++ PSE, valid after PWRGD is active; absolute maximum 100V, 5mA."
      },
      {
        "number": "7",
        "name": "PWRGD",
        "type": "output",
        "description": "Power good open-drain output that pulls down during VCLASS and inrush; absolute maximum 100V, 5mA, output low 0.8V max at 1mA."
      },
      {
        "number": "8",
        "name": "HSSRC",
        "type": "passive",
        "description": "External Hot Swap MOSFET source connection; absolute maximum -0.3V to 100V."
      },
      {
        "number": "9",
        "name": "HSGATE",
        "type": "output",
        "description": "External Hot Swap MOSFET gate control output, connect to MOSFET gate; absolute maximum current ±20mA."
      },
      {
        "number": "10",
        "name": "VPORT",
        "type": "power_in",
        "description": "PD interface upper power rail and external Hot Swap MOSFET drain connection; operating 23V to 60V, absolute maximum 100V."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Exposed pad, internally connected to GND, must be soldered to PCB GND and only connected to GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 6 (T2P) and Pin 4 (RCLASS++) are listed as 'T2P/NC' and 'RCLASS++/NC' in the pin diagram; they a"
        ],
        "pages_sent": 12,
        "cost_usd": 0.1493,
        "at": "2026-10-31T09:27:07"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/4275f.pdf",
        "pages": 12,
        "sha256": "3aab8b1d193cee44",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 11,
        "described": 11,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lt4275aidd-trpbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          2.98,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "738e2eb45860c11759f8e4f44ab26932b7c15e4d5d6c8c9ac22ae866a3e38711",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt4275aidd-trpbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          2.98,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e6a4c707721c62e65b9695cd929aac53c53c91e6ef1165327114239529e5387f",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "DD",
      "source_page": 10,
      "D": {
        "nom_mm": 3.0,
        "range_mm": [
          null,
          null
        ]
      },
      "E1": {
        "nom_mm": 3.0,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.75,
        "range_mm": [
          null,
          null
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "lt4275aidd-trpbf.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}