component
LT3980EDE#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, DFN-14-EP(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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LT3980EDE#TRPBF
Analog Devices · DC-DC Converters · DFN-14-EP(3x4)
LT3980EDE#TRPBF from Analog Devices, in a DFN-14-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYNC | input | External clock synchronization input: ground for low-ripple Burst Mode operation at low loads, tie above 0.8V for pulse-skipping mode, tie to a clock source (edges faster than 1µs) to synchronize, or tie to GND if not used. |
| 2 | NC | unconnected | No connect; not connected to internal circuitry. |
| 3 | PG | output | Open-collector power good output of an internal comparator that stays low until FB is within 9% of the final regulation voltage; valid when VIN is above 3.6V and RUN/SS is high. |
| 4 | FB | input | The LT3980 regulates this pin to 0.790V; connect the feedback resistor divider tap to it. |
| 5 | VC | passive | Output of the internal error amplifier that sets the peak switch current; an RC network from this pin to ground compensates the control loop. |
| 6 | RT | input | Oscillator resistor input; a resistor connected from this pin to ground sets the switching frequency. |
| 7 | GND | power_in | Ground pin; the exposed pad must be soldered to the PCB. |
| 8 | RUN/SS | input | Shutdown and soft-start pin: tie to ground to shut down, tie to 2.5V or more for normal operation, and tie to VIN if shutdown is unused; an RC network sets the soft-start ramp. |
| 9 | BD | power_in | Anode of the boost Schottky diode that also supplies current to the internal regulator; if connected to an external voltage higher than 3V, bias power is drawn from that source. |
| 10 | BOOST | passive | Provides a drive voltage higher than the input voltage to the internal bipolar NPN power switch. |
| 11 | SW | output | Output of the internal power switch; connect to the inductor, catch diode and boost capacitor. |
| 12 | VIN | power_in | Supplies current to the internal regulator and the internal power switch; this pin must be locally bypassed. |
| 13 | NC | unconnected | No connect; not connected to internal circuitry. |
| 14 | DA | input | Measures catch diode current and pauses the oscillator during overcurrent conditions. |
| 15 | GND | power_in | Exposed pad; ground that must be soldered to the PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-14-EP(3x4) |
| Category | Power Management ICs |
| Pins | 15 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN and RUN/SS pin voltage (absolute maximum) | VIN, VRUN/SS | 80 | V | Note 5: 80V non-repetitive 1 minute transient; 60V continuous operation | 2 | ||
| FB, RT, VC voltage (absolute maximum) | VFB, VRT, VVC | 5 | V | 2 | |||
| PG, BD, SYNC voltage (absolute maximum) | VPG, VBD, VSYNC | 25 | V | 2 | |||
| Storage temperature range | TSTG | -65 | 150 | °C | 2 | ||
| Operating junction temperature range (LT3980E) | TJ | -40 | 125 | °C | LT3980E grade | 2 | |
| Minimum input voltage | VIN(MIN) | 3.6 | V | Full operating temperature range (●) | 2 | ||
| VIN overvoltage lockout | VIN(OVLO) | 58 | 61.5 | 64 | V | Full operating temperature range (●) | 2 |
| Quiescent current from VIN, not switching | IQ(VIN) | 20 | 35 | 60 | µA | VBD = 3V, Not Switching | 2 |
| Quiescent current from VIN, not switching | IQ(VIN) | 70 | 120 | 160 | µA | VBD = 0, Not Switching | 2 |
| Quiescent current from VIN, shutdown | IQ(VIN) | 0.01 | 0.5 | µA | VRUN/SS = 0.2V | 2 | |
| Quiescent current from BD, shutdown | IQ(BD) | 0.01 | 1 | µA | VRUN/SS = 0.2V | 3 | |
| Quiescent current from BD, not switching | IQ(BD) | 55 | 82 | 115 | µA | VBD = 3V, Not Switching | 3 |
| Quiescent current from BD, not switching | IQ(BD) | 0.5 | 5 | µA | VBD = 0, Not Switching | 3 | |
| Feedback voltage | VFB | 782 | 790 | 798 | mV | Full operating temperature range (●), first printed row | 3 |
| Feedback voltage | VFB | 770 | 790 | 805 | mV | Full operating temperature range (●), second printed row | 3 |
| FB pin bias current | IFB | 10 | 40 | nA | VFB = 0.8V, VC = 1.2V (●) | 3 | |
| FB voltage line regulation | 0.002 | 0.01 | %/V | 4V < VIN < 56V | 3 | ||
| Minimum switch off-time | tOFF(MIN) | 140 | 230 | nS | Full operating temperature range (●) | 3 | |
| Switching frequency | fSW | 1.95 | 2.25 | 2.55 | MHz | RT = 8.66k | 3 |
| Switching frequency | fSW | 0.86 | 1.07 | 1.27 | MHz | RT = 29.4k | 3 |
| Switching frequency | fSW | 195 | 225 | 255 | kHz | RT = 187k | 3 |
| Switch current limit | ILIM | 3.3 | 4 | 4.9 | A | Duty Cycle = 5% | 3 |
| DA pin current to pause oscillator | IDA | 1.9 | 2.4 | 3 | A | 3 | |
| Boost Schottky reverse leakage | IR(BD) | 0.02 | 2 | µA | VBD = 0V | 3 | |
| Minimum boost voltage | VBOOST(MIN) | 1.7 | 2.2 | V | Note 4; Full operating temperature range (●) | 3 | |
| BOOST pin current | IBOOST | 40 | 55 | mA | ISW = 2A | 3 | |
| RUN/SS pin current | IRUN/SS | 6 | 10 | µA | VRUN/SS = 2.5V | 3 | |
| RUN/SS input voltage high | VRUN/SS(HIGH) | 2.5 | V | 3 | |||
| RUN/SS input voltage low | VRUN/SS(LOW) | 0.4 | V | Full operating temperature range (●) | 3 | ||
| PG threshold offset from feedback voltage | 50 | 65 | 80 | mV | VFB rising (●) | 3 | |
| PG leakage | IPG | 0.1 | 1 | µA | VPG = 5V | 3 | |
| PG sink current | IPG(SINK) | 200 | 700 | µA | VPG = 0.4V (●) | 3 | |
| SYNC threshold | VSYNC(TH) | 0.575 | 0.675 | 0.775 | V | 3 | |
| Thermal resistance, junction to ambient | θJA | 45 | °C/W | Exposed pad (pin 15) must be soldered to PCB | 2 | ||
| Thermal resistance, junction to case | θJC | 10 | °C/W | Exposed pad (pin 15) must be soldered to PCB | 2 | ||
| Error amp transconductance | gm | 500 | µmho | 3 | |||
| Error amp gain | 1800 | 3 | |||||
| VC source current | 60 | µA | 3 | ||||
| VC sink current | 60 | µA | 3 | ||||
| VC pin to switch current gain | 3.87 | A/V | 3 | ||||
| VC clamp voltage | 2 | V | 3 | ||||
| PG hysteresis | 14 | mV | 3 | ||||
| Switch VCESAT | VCESAT | 540 | mV | ISW = 2A | 3 | ||
| SYNC pin bias current | ISYNC | 0.1 | µA | VSYNC = 0V | 3 |
CAD (KiCad official)
- Symbol:
LT3980EDE#TRPBF - Footprint:
Package_DFN_QFN:DFN-14-1EP_3x4mm_P0.5mm_EP1.7x3.3mm - 3D model: DFN-14-EP(3x4) (KiCad packages3D, STEP)
- 3D model files:
lt3980ede-trpbf-etched.step/lt3980ede-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3980ede-trpbf.step/lt3980ede-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
bcc31647a3beb11a, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).