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LT3795HFE#PBF

Analog Devices · LED Drivers · TSSOP-28-EP

LT3795HFE#PBF from Analog Devices, in a TSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ISP passive Connection point for the positive terminal of the current feedback resistor (RLED), which also serves as the positive rail for the TG pin driver.
2 ISN passive Connection point for the negative terminal of the current feedback resistor (RLED).
3 TG output Top gate driver output that inverts and level-shifts the PWM signal to drive a series PMOS between VISP and (VISP - 7V) when VISP > 7V, with an internal 7V clamp limiting VGS; leave unconnected if not used.
4 GND power_in Ground that also serves as the control-loop current sense input, sensing the negative terminal of the N-channel source sense resistor.
5 ISMON output ISP/ISN current report pin with VISMON = ILED • RLED • 4, driven to ground when PWM is low; leave unconnected if not used and bypass with 47nF or higher if needed.
6 CTRL2 input Current sense threshold adjustment pin 2, identical in function to CTRL1; it must not be left open, and connecting it to GND gives zero LED current.
7 FB input Voltage loop feedback pin regulated to 1.25V nominal for constant-voltage and LED protection; it must not be tied to GND, and driving it above 1.3V pulls GATE low and drives TG high.
8 VC passive Transconductance error amplifier output used to stabilize the loop with an RC network; it is high impedance when PWM is low and must not be left open.
9 CTRL1 input Current sense threshold adjustment pin 1, identical in function to CTRL2; connect to VREF for the 250mV default threshold and do not leave open.
10 VREF power_in Voltage reference output, typically 2.015V, that can supply up to 100µA to drive CTRL pin resistor dividers.
11 SS passive Soft-start and fault timer pin with a 28µA typical pull-up to an internal 2.5V rail; it must be discharged below 0.2V to restart and must not be left open.
12 RT passive Switching frequency adjustment pin set by a resistor to GND (see the Typical Performance curve or Table 2); must not be left open.
13 RAMP input Spread spectrum modulation pin where the modulation frequency is set by 12µA/(2 • 1V • CRAMP); tie to GND if not used.
14 PWM input PWM input where a low signal turns off switching and drives TG to the ISP level; it has an internal 500k pull-down and should connect to VREF if not used.
15 SHORTLED output Open-collector pull-down that asserts on FB < 0.3V after SS reaches 1.7V at start-up or on LED overcurrent (V(ISP-ISN) > 375mV), and requires an external pull-up.
16 OPENLED output Open-collector pull-down that asserts when FB is above 1.20V (typical) and V(ISP-ISN) is below 25mV (typical), and requires an external pull-up.
17 GND power_in Ground pin, same function as pin 4.
18 SENSE input Current sense input for the control loop, to be Kelvin-connected to the positive terminal of the N-channel source sense resistor RSENSE.
19 GATE output N-channel MOSFET gate driver output that switches between INTVCC and GND and is driven to GND during shutdown, fault or idle states.
20 INTVCC power_out Regulated internal supply, typically 7.7V from VIN, for internal loads and the GATE driver; bypass with 4.7µF close to the pin, or connect directly to VIN if VIN is always ≤ 8V.
21 GND power_in Ground pin, same function as pin 4.
22 GND power_in Ground pin, same function as pin 4.
23 VIN power_in Input supply pin (110V absolute maximum) that must be locally bypassed with a 0.22µF or larger capacitor placed close to the IC.
24 EN/UVLO input Enable and undervoltage lockout pin with an accurate 1.22V falling threshold; tie to 0.4V or less to disable the device, and it is rated 110V absolute maximum.
25 OVLO input Input overvoltage lockout pin with an accurate 1.25V rising threshold that enables switching when power is OK; rated 8V absolute maximum.
26 IVINN passive Connection point for the negative terminal of the input current sense resistor RINSNS, where IIN = 60mV/RINSNS.
27 IVINP passive Connection point for the positive terminal of the input current sense resistor RINSNS.
28 IVINCOMP output Input current sense amplifier output with VIVINCOMP = IIN • RINSNS • 20; it requires a 10nF or larger capacitor to GND and must not be left open or loaded with current.
29 GND power_in Exposed pad ground that must be soldered directly to the PCB ground plane.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-28-EP
Category LED Drivers
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN VIN 110 V 2
EN/UVLO EN/UVLO 110 V 2
ISP, ISN ISP, ISN 110 V 2
IVINP, IVINN IVINP, IVINN 110 V 2
VIN - IVINN VIN - IVINN -0.3 4 V 2
PWM, SHORTLED, OPENLED PWM, SHORTLED, OPENLED 12 V 2
FB, RAMP, OVLO FB, RAMP, OVLO 8 V 2
CTRL1, CTRL2 CTRL1, CTRL2 15 V 2
ISMON, IVINCOMP ISMON, IVINCOMP 5 V 2
VC, VREF, SS VC, VREF, SS 3 V 2
RT RT 2 V 2
Operating Junction Temperature Range (LT3795H) TJ -40 150 °C LT3795H grade 2
Storage Temperature Range TSTG -65 150 °C 2
Maximum Junction Temperature TJMAX 150 °C 2
Thermal Resistance, Junction to Ambient θJA 30 °C/W 2
Thermal Resistance, Junction to Case θJC 10 °C/W 2
VIN Minimum Operating Voltage VIN 4.5 V VIN Tied to INTVCC 3
VIN Shutdown IQ IQ 10 µA EN/UVLO = 0V, PWM = 0V 3
VIN Shutdown IQ IQ 22 µA EN/UVLO = 1.15V, PWM = 0V 3
VIN Operating IQ (Not Switching) IQ 2.9 3.5 mA RT = 82.5k to GND, FB = 1.5V 3
VREF Voltage VREF 1.97 2.015 2.06 V -100µA ≤ IREF ≤ 10µA 3
VREF Pin Line Regulation VREF 1.5 m%/V 4.5V < VIN < 110V 3
SENSE Current Limit Threshold SENSE 100 117 125 mV 3
SS Sourcing Current SS 28 µA SS = 0V 3
Full Scale LED Current Sense Threshold (V(ISP-ISN)) V(ISP-ISN) 243 250 257 mV ISP = 48V, CTRL1 ≥ 1.2V, CTRL2 ≥ 1.2V 3
9/10th LED Current Sense Threshold (V(ISP-ISN)) V(ISP-ISN) 220 225 230 mV ISP = 48V, CTRL1 = 1V, CTRL2 = 1.2V 3
1/2 LED Current Sense Threshold (V(ISP-ISN)) V(ISP-ISN) 119 125 130 mV ISP = 48V, CTRL1 = 0.6V, CTRL2 = 1.2V 3
1/10th LED Current Sense Threshold (V(ISP-ISN)) V(ISP-ISN) 16 25 32 mV ISP = 48V, CTRL1 = 0.2V, CTRL2 = 1.2V 3
ISP/ISN Current Monitor Voltage (VISMON) VISMON 0.96 1 1.04 V V(ISP-ISN) = 250mV, ISP = 48V, -50µA ≤ IISMON ≤ 0 µA 3
ISP/ISN Overcurrent Protection Threshold (V(ISP-ISN)) V(ISP-ISN) 360 375 390 mV ISN = 48V 3
CTRL1, CTRL2 Input Bias Current ICTRL 50 200 nA Current Out of Pin, CTRL = 1V 3
ISP/ISN Current Sense Amplifier Input Common Mode Range VISP, VISN 0 110 V 3
ISP/ISN Input Current Bias Current (Combined) IISP, IISN 700 µA PWM = 5V (Active), ISP = 48V 3
ISP/ISN Input Current Bias Current (Combined) IISP, IISN 0 0.1 µA PWM = 0V (Standby), ISP = 48V 3
VC Output Impedance VC 2000 kΩ 3
VC Standby Input Bias Current IVC -20 20 nA PWM = 0V 3
FB Regulation Voltage (VFB) VFB 1.23 1.25 1.27 V ISP = ISN = 48V 3
FB Regulation Voltage (VFB) VFB 1.238 1.25 1.264 V ISP = ISN = 48V 3
FB Pin Input Bias Current IFB 40 200 nA Current Out of Pin, FB = VFB 3
FB SHORTLED Threshold FB 300 350 mV SHORTLED Falling 3
Input Current Sense Amplifier Input Voltage Common Range (VIVINP/VIVINN) VIVINP/VIVINN 2.5 110 V 4
Input Current Sense Threshold (VIVINP - VIVINN) VIVINP - VIVINN 57 60 63 mV VIVINP = 48V, VIN = 48V 4
Input Current Monitor V(IVINCOMP) V(IVINCOMP) 0.94 1 1.06 V VIVINP-VIVINN = 50mV, VIN = 48V 4
Input Bias Current (I(IVINN)) I(IVINN) 100 1000 nA VIVINP-VIVINN = 50mV, VIN = 48V 4
INTVCC Regulation Voltage INTVCC 7.4 7.7 8 V 4
Dropout (VIN-INTVCC) VIN-INTVCC 550 mV IINTVCC = -10mA, VIN = 4.5V 4
INTVCC Undervoltage Lockout INTVCC UVLO 3.8 4 4.1 V 4
Switching Frequency fSW 85 105 125 kHz RT = 82.5k 4
Switching Frequency fSW 340 400 480 kHz RT = 19.6k 4
Switching Frequency fSW 900 1000 1150 kHz RT = 6.65k 4
PWM Input Threshold Rising PWM 0.96 1 1.04 V 4
EN/UVLO Threshold Voltage Falling EN/UVLO 1.185 1.22 1.25 V 4
OVLO Threshold Voltage Rising OVLO 1.215 1.25 1.28 V 4

CAD (KiCad official)

  • Symbol: LT3795HFE#PBF
  • Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • 3D model: TSSOP-28-EP (KiCad packages3D, STEP)
  • 3D model files: lt3795hfe-pbf-etched.step / lt3795hfe-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3795hfe-pbf.step / lt3795hfe-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (32 pp, sha256 11ad89e3aee599fa, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF