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LT3751EFE#TRPBF

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Analog Devices Power Management Specialized - PMIC, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icslt3751efe#trpbffactory-2.0.0extractor-text

Verified LT3751EFE#TRPBF

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 21 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT3751EFE#TRPBF · HTSSOP-20-EP · 21 pins
  • ✓copper: 21 copper pads, none touching another net
  • ✓datasheet: all 21 pin names found in the 34-page datasheet
  • ✓distributor: lcsc C671369, digikey LT3751EFE#TRPBFTR-ND, mouser 584-LT3751EFE#TRPBF
  • ✓family: TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0q9h5d4o/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.31)
  • ✓pads: 21 pins = 21 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 21 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt3751efe-trpbf.kicad_sym✓ lt3751efe-trpbf.kicad_mod✓ lt3751efe-trpbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10d ago
viewers lt3751efe-trpbf: viewers · Ray 10d ago
lt3751efe-trpbf-etched.glb Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf-etched.step lt3751efe-trpbf: factory component page (tier=mfr) · Ray 10d ago
lt3751efe-trpbf-hero.glb lt3751efe-trpbf: hero GLB from the etched model (keeps the MPN mark) · Ray 10d ago
lt3751efe-trpbf-hero.overlay.json Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf.glb Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf.kicad_mod Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf.kicad_sym Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf.lbr Publish 0.1.0 · Ray 10d ago
lt3751efe-trpbf.step Publish 0.1.0 · Ray 10d ago
package.json Publish 0.1.0 · Ray 10d ago
page.json Set visibility: public · Ray 10d ago
README.md Publish 0.1.0 · Ray 10d ago
verification.json Verified: Published by the parts factory: tier mfr, 21 pins · Ray 10d ago

LT3751EFE#TRPBF

Analog Devices · Power Management Specialized - PMIC · HTSSOP-20-EP

LT3751EFE#TRPBF from Analog Devices, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RVTRANS input Transformer supply sense pin; connect a resistor to the VTRANS supply (sized per Table 2), minimum VTRANS operating voltage is 4.75V.
2 UVLO1 input VTRANS undervoltage lockout pin that trips the FAULT latch low when VTRANS drops below 1.225V + 50µA • RUVLO1.
3 OVLO1 input VTRANS overvoltage lockout pin that trips the FAULT latch low when VTRANS rises above 1.225V + 50µA • ROVLO1.
4 UVLO2 input VCC undervoltage lockout pin that trips the FAULT latch low when VCC drops below 1.225V + 50µA • RUVLO2.
5 OVLO2 input VCC overvoltage lockout pin that trips the FAULT latch low when VCC rises above 1.225V + 50µA • ROVLO2.
6 FAULT output Open-collector indication pin that turns on when VTRANS or VCC leaves the user-selected range or an internal UVLO occurs, stopping switching; needs a pull-up, limit current to 1mA.
7 DONE output Open-collector indication pin that turns on when the target output voltage is reached or FAULT goes low; needs a pull-up, limit current to 1mA.
8 CHARGE input Initiates a charge cycle or enables the part when driven above 1.5V, shutdown when below 0.3V; turn-on ramp 10ns to 10ms and not to be ramped directly with VCC.
9 CLAMP input Gate driver clamp select: tie to VCC for the 5.6V clamp or to ground for the 10.5V clamp.
10 FB input Feedback pin for low noise regulation, internally regulated to 1.22V with a resistive divider from the output; must not float, tie to divider or ground.
11 CSN input Negative current sense pin; connect to the local RSENSE ground with a Kelvin connection, current limit is 106mV/RSENSE.
12 CSP input Positive current sense pin connected to the NMOS source and sense resistor; current limit is 106mV/RSENSE in charge mode, reducible to a minimum of 11mV/RSENSE in regulation mode.
13 VCC power_in Input supply pin that must be locally bypassed with an X5R or better ceramic capacitor; minimum operating voltage is 4.75V (24V maximum).
14 LVGATE output Low voltage gate pin tied to the NMOS gate when VCC is below 8V, or tied directly to VCC when VCC is above 8V.
15 HVGATE output High voltage gate pin connected to the NMOS gate for all VCC voltages; the driver drives to within VCC - 2V each cycle.
16 RBG passive Bias generation pin that sets a bias current of 0.98V/RBG, used to select RDCM, RVOUT and RVTRANS resistance.
17 NC unconnected No connection.
18 RVOUT input Output voltage sense pin that develops a current proportional to the output capacitor voltage via a resistor to the NMOS drain, VOUT = 0.98 • N • (RVOUT/RBG) - VDIODE when RVOUT = RVTRANS.
19 NC unconnected No connection.
20 RDCM input Discontinuous mode sense pin that detects the NMOS drain reaching 20µA • RDCM + VTRANS to start the next cycle; use a resistor equal to 0.45 times the RVTRANS resistor to the drain.
21 GND power_in Ground exposed pad (pin 21); tie directly to the local ground plane and solder to the PCB.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package HTSSOP-20-EP
Category Power Management ICs
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Voltage VCC 4.75 24 V 3
RVTRANS Voltage 4.75 65 V Note 3 3
VCC Quiescent Current IQ 5.5 8 mA Not Switching, CHARGE = 5V 3
VCC Quiescent Current (shutdown) IQ 0 1 µA Not Switching, CHARGE = 0.3V 3
RVTRANS, RDCM Quiescent Current 35 40 45 µA Not Switching, CHARGE = 5V 3
RVTRANS, RDCM Quiescent Current (shutdown) 0 1 µA Not Switching, CHARGE = 0.3V 3
RVOUT Quiescent Current 42 47 52 µA Not Switching, CHARGE = 5V 3
RVOUT Quiescent Current (shutdown) 0 1 µA Not Switching, CHARGE = 0.3V 3
CHARGE Minimum Enable Voltage 1.5 V 3
CHARGE Maximum Disable Voltage 0.3 V IVCC ≤ 1µA 3
One-Shot Clock Period 32 38 44 μs 3
VOUT Comparator Trip Voltage 0.955 0.98 1.005 V Measured at RBG Pin 3
DCM Comparator Trip Voltage 350 600 900 mV Measured as VDRAIN, VTRANS, RDCM = 25kΩ, VCC = 4.75V (Note 5) 3
Current Limit Comparator Trip Voltage 100 106 112 mV FB Pin = 0V 3
Current Limit Comparator Trip Voltage 7 11 15 mV FB Pin = 1.3V 3
FB Pin Bias Current 64 300 nA Current Sourced from FB Pin, Measured at FB Pin Voltage 3
FB Pin Voltage 1.19 1.22 1.25 V Note 6 3
FB Pin Charge Mode Threshold 1.12 1.16 1.2 V 3
FB Pin Overvoltage Mode Threshold 1.29 1.34 1.38 V 3
DONE Output Signal Low 40 200 mV 100kΩ to 5V 3
DONE Leakage Current 5 200 nA DONE = 5V 3
FAULT Output Signal Low 40 200 mV 100kΩ to 5V 3
FAULT Leakage Current 5 200 nA FAULT = 5V 3
UVLO1 Pin Current 48.5 50 51.5 μA UVLO1 Pin Voltage = 1.24V 3
UVLO2 Pin Current 48.5 50 51.5 μA UVLO2 Pin Voltage = 1.24V 3
OVLO1 Pin Current 48.5 50 51.5 μA OVLO1 Pin Voltage = 1.24V 3
OVLO2 Pin Current 48.5 50 51.5 μA OVLO2 Pin Voltage = 1.24V 3
UVLO1 Threshold 1.195 1.225 1.255 V Measured from Pin to GND 4
UVLO2 Threshold 1.195 1.225 1.255 V Measured from Pin to GND 4
OVLO1 Threshold 1.195 1.225 1.255 V Measured from Pin to GND 4
OVLO2 Threshold 1.195 1.225 1.255 V Measured from Pin to GND 4
Gate High Voltage 4.98 5 V VCC = 5V, LVGATE Active 4
Gate High Voltage 10 10.5 11.5 V VCC = 12V, LVGATE Inactive 4
Gate High Voltage 5 5.6 6.5 V VCC = 12V, LVGATE Inactive, CLAMP Pin = 5V 4
VCC, CHARGE, CLAMP Voltage 24 V 2
DONE, FAULT Voltage 24 V 2
LVGATE Voltage 24 V Note 8 2
VCC, LVGATE 8 V 2
RBG, CSP, CSN Voltage 2 V 2
FB Voltage 5 V 2
Current into DONE Pin -1 1 mA 2
Current into FAULT Pin -1 1 mA 2
Current into RVTRANS Pin -1 1 mA 2
Current into RVOUT Pin -10 10 mA 2
Current into RDCM Pin -10 10 mA 2
Current into UVLO1/UVLO2/OVLO1/OVLO2 Pin -1 1 mA each pin 2
Maximum Junction Temperature TJMAX 125 °C 2
Operating Temperature Range -40 125 °C Note 2 2
Storage Temperature Range -65 150 °C 2
Thermal Resistance Junction-Ambient θJA 38 °C/W FE package, TJMAX = 125°C 2
Gate Peak Pull-Up Current 2 A VCC = 5V, LVGATE Active 4
CLAMP Pin Threshold 1.6 V 4

CAD (KiCad official)

  • Symbol: LT3751EFE#TRPBF
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lt3751efe-trpbf-etched.step / lt3751efe-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3751efe-trpbf.step / lt3751efe-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (34 pp, sha256 51f55e0aa25cce81, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF