component
LT3686IDD#PBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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LT3686IDD#PBF
Analog Devices · DC-DC Converters · DFN-10-EP(3x3)
LT3686IDD#PBF from Analog Devices, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | The VIN pin supplies current to the internal regulator and internal power switch and must be locally bypassed; the input range is 3.6V to 37V. |
| 2 | BD | passive | The BD pin supplies current to the internal Boost Schottky diode, should be tied to the output whenever possible, and regulates an active load when MODE is above 0.8V. |
| 3 | FB | input | The feedback pin regulates to 0.8V, with the output set by VOUT = 0.8(1 + R1/R2) and a recommended R2 of 10k. |
| 4 | SS | input | The soft-start and tracking pin is charged by an internal 2µA source tied to a 2.5V reference, and feedback stops tracking at 0.8V; the pin should float if soft-start is not used. |
| 5 | RT | input | The RT pin programs the oscillator frequency through a resistor selected from Table 1 in the applications section. |
| 6 | EN/UVLO | input | The EN/UVLO pin starts up the device, shuts it down when pulled below 0.4V, provides a 1.27V UVLO threshold, and must not be driven above VIN. |
| 7 | MODE | input | The MODE pin selects the BD active load, which is enabled when MODE is above 0.8V and disabled when tied to GND. |
| 8 | BOOST | input | The BOOST pin provides a drive voltage higher than the input voltage to the internal NPN power switch. |
| 9 | DA | passive | The DA pin is the connection for the catch diode (D1) anode. |
| 10 | SW | output | The SW pin is the output of the internal power switch and connects to the inductor, catch diode and boost capacitor. |
| 11 | GND | power_in | The exposed pad GND pin is the only ground connection for the device and must be soldered to a large copper area to reduce thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-10-EP(3x3) |
| Category | Power Management ICs |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Quiescent Current at Shutdown | IQ | 0.1 | 1 | µA | VEN/UVLO < 0.4V | 3 | |
| Quiescent Current at Shutdown | IQ | 10 | 15 | µA | VEN/UVLO = 1V | 3 | |
| Quiescent Current Not Switching | IQ | 1.1 | 1.3 | mA | Not Switching, MODE ≤ 0.4V | 3 | |
| Quiescent Current Not Switching | IQ | 1.2 | 1.4 | mA | Not Switching, MODE ≥ 0.8V | 3 | |
| Internal Undervoltage Lockout | 3.4 | 3.6 | V | 3 | |||
| Overvoltage Lockout | 37 | 38 | 39 | V | l (full operating temperature range) | 3 | |
| Feedback Voltage | VFB | 0.79 | 0.8 | 0.81 | V | l (full operating temperature range) | 3 |
| Feedback Voltage | VFB | 0.785 | 0.8 | 0.815 | V | l (full operating temperature range) | 3 |
| FB Pin Bias Current | IFB | 20 | 100 | nA | 3 | ||
| Minimum On Time | 100 | 110 | ns | 3 | |||
| Minimum Off Time | 150 | 200 | ns | 3 | |||
| Switch Current Limit | 1.9 | 2.3 | 2.6 | A | Note 3 | 3 | |
| Switch Current Limit | 1.85 | 2.3 | 2.65 | A | l (full operating temperature range), Note 3 | 3 | |
| Switch Active Current | 400 | 600 | µA | SW = 10V (Note 4) | 3 | ||
| Switch Active Current | 20 | 30 | µA | SW = 0V (Note 5) | 3 | ||
| Minimum Boost Voltage Above Switch | 2.2 | 2.4 | V | ISW = 1.2A | 3 | ||
| Max BD Pin Active Load Current | 30 | 40 | mA | MODE > 0.8V, BD < 5.2V | 3 | ||
| BD Pin Active Load Disable Threshold | 5.2 | 6.5 | V | l (full operating temperature range) | 3 | ||
| DA Pin Current to Stop OSC | 1.2 | 1.7 | A | l (full operating temperature range) | 3 | ||
| MODE High | 0.8 | V | l (full operating temperature range) | 3 | |||
| MODE Low | 0.4 | V | l (full operating temperature range) | 3 | |||
| SS Source Current | ISS | 1.3 | 2 | 2.7 | µA | VSS = 1V | 3 |
| EN/UVLO Threshold to Turn Off | 1.22 | 1.27 | 1.32 | V | l (full operating temperature range) | 3 | |
| EN/UVLO Hysteresis Current | 1.8 | 2.4 | 3 | µA | 3 | ||
| BOOST Pin Above SW Pin | VBOOST-SW | 25 | V | 2 | |||
| FB Voltage | VFB | 6 | V | 2 | |||
| BD Voltage | VBD | 25 | V | 2 | |||
| RT Voltage | VRT | 6 | V | 2 | |||
| SS Voltage | VSS | 2.5 | V | 2 | |||
| MODE Voltage | VMODE | 6 | V | 2 | |||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | LT3686I | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Thermal Resistance Junction to Ambient | θJA | 43 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
LT3686IDD#PBF - Footprint:
Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm - 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
lt3686idd-pbf-etched.step/lt3686idd-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3686idd-pbf.step/lt3686idd-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (28 pp, sha256
21c973cf91b5f4e3, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).