component
LT3506IDHD#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, DFN-16-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LT3506IDHD#TRPBF
Analog Devices · DC-DC Converters · DFN-16-EP(4x5)
LT3506IDHD#TRPBF from Analog Devices, in a DFN-16-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST1 | input | Provides a drive voltage above VIN to the internal NPN power switch 1, tied through a diode from VOUT or VIN; the BOOST pin voltage is rated to 50V maximum and the BOOST-to-SW voltage to 25V maximum. |
| 2 | SW1 | output | Output of internal power switch 1, connected to the inductor, catch diode and boost capacitor; the absolute maximum VIN rating of 25V applies to the switching node path. |
| 3 | VIN1 | power_in | Supplies current to the internal regulator and internal power switch 1, must be locally bypassed, and is rated -0.3V to 25V absolute maximum with a 3.6V to 25V operating input range. |
| 4 | VIN1 | power_in | Supplies current to the internal regulator and internal power switch 1, must be locally bypassed, and is rated -0.3V to 25V absolute maximum with a 3.6V to 25V operating input range. |
| 5 | VIN2 | power_in | Supplies current to internal power switch 2, must be locally bypassed, and should connect directly to VIN1 unless channel 2 is powered from a different source. |
| 6 | VIN2 | power_in | Supplies current to internal power switch 2, must be locally bypassed, and should connect directly to VIN1 unless channel 2 is powered from a different source. |
| 7 | SW2 | output | Output of internal power switch 2, connected to the inductor, catch diode and boost capacitor. |
| 8 | BOOST2 | input | Provides a drive voltage above VIN to the internal NPN power switch 2, tied through a diode from VOUT or VIN; the BOOST pin voltage is rated to 50V maximum and the BOOST-to-SW voltage to 25V maximum. |
| 9 | FB2 | input | Regulates to 800mV; connect the channel 2 feedback resistor divider tap to this pin. |
| 10 | VC2 | passive | Output of error amplifier 2 that sets peak switch current and is used for loop compensation; pull to ground with an open drain to shut down regulator 2, and the VC pins are rated to 5.5V maximum. |
| 11 | PG2 | output | Open-collector power good output for channel 2, low until FB2 is within 10% of its final regulation voltage; valid when VIN is above 3.4V and RUN/SS2 is high, and it may be left unconnected. |
| 12 | RUN/SS2 | input | Pull to ground with an open drain or collector to shut down regulator 2; a capacitor to ground provides soft-start, leave unconnected if unused, and the pin is rated to 5.5V maximum. |
| 13 | RUN/SS1 | input | Pull to ground with an open drain or collector to shut down regulator 1; a capacitor to ground provides soft-start, leave unconnected if unused, and the pin is rated to 5.5V maximum. |
| 14 | PG1 | output | Open-collector power good output for channel 1, low until FB1 is within 10% of its final regulation voltage; valid when VIN is above 3.4V and RUN/SS1 is high, and it may be left unconnected. |
| 15 | VC1 | passive | Output of error amplifier 1 that sets peak switch current and is used for loop compensation; pull to ground with an open drain to shut down regulator 1, and the VC pins are rated to 5.5V maximum. |
| 16 | FB1 | input | Regulates to 800mV; connect the channel 1 feedback resistor divider tap to this pin. |
| 17 | GND | power_in | Exposed pad provides electrical ground and thermal contact to the PCB and must be soldered to the board for proper operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-16-EP(4x5) |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage (DHD package) | VFB | 792 | 800 | 808 | mV | -40°C to 85°C, DHD | 3 |
| Switching Frequency (LT3506) | fSW | 500 | 575 | 650 | kHz | LT3506 | 3 |
| DC Maximum Duty Cycle (LT3506) | DC | 89 | 93 | % | LT3506 | 3 | |
| Switch Current Limit | ISW | 2 | 2.6 | 3.6 | A | (Note 3) | 3 |
| Undervoltage Lockout | VIN(MIN) | 3.4 | 3.6 | V | l (full operating temperature range) | 3 | |
| Quiescent Current | IINQ | 3.8 | 4.8 | mA | Not Switching | 3 | |
| Shutdown Current | IINSD | 30 | 45 | μA | VRUNSS = 0V | 3 | |
| FB Pin Bias Current | IFB | 40 | 100 | nA | VFB = 800mV, VC = 0.4V | 3 | |
| Minimum Boost Voltage Above Switch | VBOOST(MIN) | 1.5 | 2.5 | V | ISW = 1A | 3 | |
| BOOST Pin Current | IBOOST | 20 | 30 | mA | ISW = 1A | 3 | |
| RUN/SS Threshold | VRUN/SS(THRESH) | 0.3 | 0.8 | V | 3 | ||
| PG Voltage Output Low | VPG(LOW) | 0.22 | 0.4 | V | VFB = 640mV, IPG = 250μA | 3 | |
| PG Pin Leakage | ILPG | 0.1 | 1 | μA | VPG = 2V | 3 | |
| VIN Voltage | VIN | -0.3 | 25 | V | 2 | ||
| BOOST Pin Above SW Pin | VBOOST-VSW | 25 | V | 2 | |||
| PG Pin Voltage | VPG | 25 | V | 2 | |||
| Maximum Junction Temperature | TJMAX | 125 | °C | 2 | |||
| Storage Temperature Range | -65 | 125 | °C | 2 | |||
| Operating Temperature Range (I Grade) | -40 | 125 | °C | I Grade (Note 2) | 2 | ||
| Input Voltage Range | VIN | 3.6 | 25 | V | Wide input voltage range (Features) | 1 | |
| Thermal Resistance, Junction-to-Ambient | θJA | 43 | °C/W | DHD package | 2 | ||
| Thermal Resistance, Junction-to-Case | θJC | 4.3 | °C/W | DHD package | 2 |
CAD (KiCad official)
- Symbol:
LT3506IDHD#TRPBF - Footprint:
Package_DFN_QFN:DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm - 3D model: DFN-16-EP(4x5) (KiCad packages3D, STEP)
- 3D model files:
lt3506idhd-trpbf-etched.step/lt3506idhd-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3506idhd-trpbf.step/lt3506idhd-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
f6bd660088bb6607, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LT3506IDHD#TRPBF
**Analog Devices** · DC-DC Converters · DFN-16-EP(4x5)
LT3506IDHD#TRPBF from Analog Devices, in a DFN-16-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST1 | input | Provides a drive voltage above VIN to the internal NPN power switch 1, tied through a diode from VOUT or VIN; the BOOST pin voltage is rated to 50V maximum and the BOOST-to-SW voltage to 25V maximum. |
| 2 | SW1 | output | Output of internal power switch 1, connected to the inductor, catch diode and boost capacitor; the absolute maximum VIN rating of 25V applies to the switching node path. |
| 3 | VIN1 | power_in | Supplies current to the internal regulator and internal power switch 1, must be locally bypassed, and is rated -0.3V to 25V absolute maximum with a 3.6V to 25V operating input range. |
| 4 | VIN1 | power_in | Supplies current to the internal regulator and internal power switch 1, must be locally bypassed, and is rated -0.3V to 25V absolute maximum with a 3.6V to 25V operating input range. |
| 5 | VIN2 | power_in | Supplies current to internal power switch 2, must be locally bypassed, and should connect directly to VIN1 unless channel 2 is powered from a different source. |
| 6 | VIN2 | power_in | Supplies current to internal power switch 2, must be locally bypassed, and should connect directly to VIN1 unless channel 2 is powered from a different source. |
| 7 | SW2 | output | Output of internal power switch 2, connected to the inductor, catch diode and boost capacitor. |
| 8 | BOOST2 | input | Provides a drive voltage above VIN to the internal NPN power switch 2, tied through a diode from VOUT or VIN; the BOOST pin voltage is rated to 50V maximum and the BOOST-to-SW voltage to 25V maximum. |
| 9 | FB2 | input | Regulates to 800mV; connect the channel 2 feedback resistor divider tap to this pin. |
| 10 | VC2 | passive | Output of error amplifier 2 that sets peak switch current and is used for loop compensation; pull to ground with an open drain to shut down regulator 2, and the VC pins are rated to 5.5V maximum. |
| 11 | PG2 | output | Open-collector power good output for channel 2, low until FB2 is within 10% of its final regulation voltage; valid when VIN is above 3.4V and RUN/SS2 is high, and it may be left unconnected. |
| 12 | RUN/SS2 | input | Pull to ground with an open drain or collector to shut down regulator 2; a capacitor to ground provides soft-start, leave unconnected if unused, and the pin is rated to 5.5V maximum. |
| 13 | RUN/SS1 | input | Pull to ground with an open drain or collector to shut down regulator 1; a capacitor to ground provides soft-start, leave unconnected if unused, and the pin is rated to 5.5V maximum. |
| 14 | PG1 | output | Open-collector power good output for channel 1, low until FB1 is within 10% of its final regulation voltage; valid when VIN is above 3.4V and RUN/SS1 is high, and it may be left unconnected. |
| 15 | VC1 | passive | Output of error amplifier 1 that sets peak switch current and is used for loop compensation; pull to ground with an open drain to shut down regulator 1, and the VC pins are rated to 5.5V maximum. |
| 16 | FB1 | input | Regulates to 800mV; connect the channel 1 feedback resistor divider tap to this pin. |
| 17 | GND | power_in | Exposed pad provides electrical ground and thermal contact to the PCB and must be soldered to the board for proper operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-16-EP(4x5) |
| Category | Power Management (PMIC) |
| Pins | 17 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Voltage (DHD package) | VFB | 792 | 800 | 808 | mV | -40°C to 85°C, DHD | 3 |
| Switching Frequency (LT3506) | fSW | 500 | 575 | 650 | kHz | LT3506 | 3 |
| DC Maximum Duty Cycle (LT3506) | DC | 89 | | 93 | % | LT3506 | 3 |
| Switch Current Limit | ISW | 2 | 2.6 | 3.6 | A | (Note 3) | 3 |
| Undervoltage Lockout | VIN(MIN) | 3.4 | | 3.6 | V | l (full operating temperature range) | 3 |
| Quiescent Current | IINQ | | 3.8 | 4.8 | mA | Not Switching | 3 |
| Shutdown Current | IINSD | | 30 | 45 | μA | VRUNSS = 0V | 3 |
| FB Pin Bias Current | IFB | | 40 | 100 | nA | VFB = 800mV, VC = 0.4V | 3 |
| Minimum Boost Voltage Above Switch | VBOOST(MIN) | | 1.5 | 2.5 | V | ISW = 1A | 3 |
| BOOST Pin Current | IBOOST | | 20 | 30 | mA | ISW = 1A | 3 |
| RUN/SS Threshold | VRUN/SS(THRESH) | 0.3 | | 0.8 | V | | 3 |
| PG Voltage Output Low | VPG(LOW) | | 0.22 | 0.4 | V | VFB = 640mV, IPG = 250μA | 3 |
| PG Pin Leakage | ILPG | | 0.1 | 1 | μA | VPG = 2V | 3 |
| VIN Voltage | VIN | -0.3 | | 25 | V | | 2 |
| BOOST Pin Above SW Pin | VBOOST-VSW | | | 25 | V | | 2 |
| PG Pin Voltage | VPG | | | 25 | V | | 2 |
| Maximum Junction Temperature | TJMAX | | | 125 | °C | | 2 |
| Storage Temperature Range | | -65 | | 125 | °C | | 2 |
| Operating Temperature Range (I Grade) | | -40 | | 125 | °C | I Grade (Note 2) | 2 |
| Input Voltage Range | VIN | 3.6 | | 25 | V | Wide input voltage range (Features) | 1 |
| Thermal Resistance, Junction-to-Ambient | θJA | | 43 | | °C/W | DHD package | 2 |
| Thermal Resistance, Junction-to-Case | θJC | | 4.3 | | °C/W | DHD package | 2 |
## CAD (KiCad official)
- Symbol: `LT3506IDHD#TRPBF`
- Footprint: `Package_DFN_QFN:DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm`
- 3D model: DFN-16-EP(4x5) (KiCad packages3D, STEP)
- 3D model files: `lt3506idhd-trpbf-etched.step` / `lt3506idhd-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lt3506idhd-trpbf.step` / `lt3506idhd-trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589853412834635776) (24 pp, sha256 `f6bd660088bb6607`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lt3506idhd-trpbf-datasheet.pdf)