main
Ray Publish 0.1.0 d440348 9d ago

LT3086IDHD#PBF

Analog Devices · Linear Voltage Regulators (LDO) · DFN-16-EP(4x5)

LT3086IDHD#PBF from Analog Devices, in a DFN-16-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin that must be tied to the exposed pad, the other GND pins and the PCB ground, with GND pin current typically 1.2mA at zero load rising to about 44mA at full load.
2 ILIM input External current limit programming pin, where current limit equals 1000 × (0.8V/RMON) when connected to IMON with a resistor to GND, an internal clamp limits it to about 1V, and it must be grounded if external limit is not used.
3 IMON output Output current monitor that sources 1/1000 of the load current, with a resistor to GND producing a load-dependent voltage for an ADC and a connection to ILIM making current limit externally programmable.
4 CDC passive Cable drop compensation pin that connects to SET through resistor RCDC, requires RMON from IMON to GND to be enabled, and has an absolute maximum current into the pin of less than 8mA.
5 RPWRGD input Power good threshold input comparing against a 0.4V threshold with a 50µA current source to GND, where PWRGD asserts low when this pin is below 0.4V and a resistor from OUT sets the threshold.
6 SET input Error amplifier inverting input that regulates to 0.4V with a 50µA current source to GND, where a resistor from OUT to SET sets the output voltage and the pin is rated -0.3V to 36V.
7 OUT power_out Regulator output that supplies the load and must be connected together with OUT pin 8, with a minimum 10µF ceramic output capacitor with ESR below 100mΩ and output range 0.4V to 32V.
8 OUT power_out Regulator output that supplies the load and must be connected together with OUT pin 7, with a minimum 10µF ceramic output capacitor with ESR below 100mΩ and output range 0.4V to 32V.
9 NC unconnected Listed as NC in the DHD pin configuration, and the datasheet gives no function for this pin.
10 IN power_in Input supply pin that must be connected together with IN pin 11, supports a 1.4V to 40V input range, withstands a 45V reverse voltage, and needs a 10µF minimum input capacitor where the input is far from the main filter.
11 IN power_in Input supply pin that must be connected together with IN pin 10, supports a 1.4V to 40V input range, withstands a 45V reverse voltage, and needs a 10µF minimum input capacitor where the input is far from the main filter.
12 SHDN input Shutdown and undervoltage lockout pin where pulling it typically below 1V turns the output off with under 1µA quiescent current, the turn-on threshold is typically 1.22V, and it should be tied to IN if unused.
13 TEMP output Die junction temperature output that gives 250mV at 25°C with a 10mV/°C slope, can program a thermal limit through a resistor to GND at a 100µA trip point, and must have less than 100pF of capacitance.
14 TRACK bidirectional Track pin for master/slave paralleling that is connected to the master IMON/ILIM pins, where a slave TRACK voltage below 1.2V shuts off its 50µA SET reference current and the pin is clamped high by default when unused.
15 PWRGD output Open-collector power good flag that asserts low when RPWRGD is below 400mV with a maximum low output of 200mV at 200µA sink current, and it may be pulled up to 36V.
16 GND power_in Ground pin that must be tied to the exposed pad, the other GND pins and the PCB ground.
17 GND power_in Exposed pad that is electrically GND and must be soldered to the PCB to ensure proper electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package DFN-16-EP(4x5)
Category Power Management ICs
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Input Voltage 1.4 1.55 V ILOAD = 2.1A, ∆VOUT = -1% 3
Reference Voltage VSET 396 400 404 mV VIN = 1.55V, ILOAD = 1mA 3
Reference Voltage VSET 392 400 408 mV 1.55V < VIN < 40V, 1mA < ILOAD < 2.1A (TJ < 125°C) 3
Reference Current ISET 49.5 50 50.5 µA VIN = 1.55V, ILOAD = 1mA 3
Reference Current ISET 49 50 51 µA 1.55V < VIN < 40V, 1mA < ILOAD < 2.1A 3
Line Regulation VSET -0.12 0.1 mV VIN = 1.55V to 40V, ILOAD = 1mA (TJ < 125°C) 3
Load Regulation VSET -8 0.25 1 mV ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V (TJ < 125°C) 3
Load Regulation ISET 0.08 µA ILOAD = 1mA to 2.1A, VIN = VOUT + 0.55V (TJ < 125°C) 3
Dropout Voltage 10 65 100 mV VIN = VOUT(NOMINAL), ILOAD = 1mA 3
Dropout Voltage 100 135 160 mV VIN = VOUT(NOMINAL), ILOAD = 100mA 3
Dropout Voltage 150 195 235 mV VIN = VOUT(NOMINAL), ILOAD = 500mA 3
Dropout Voltage 260 335 425 mV VIN = VOUT(NOMINAL), ILOAD = 1.5A 3
Dropout Voltage 330 415 540 mV VIN = VOUT(NOMINAL), ILOAD = 2.1A 3
GND Pin Current 1.2 2.4 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 0µA 4
GND Pin Current 1.3 2.6 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1mA 4
GND Pin Current 1.8 3.6 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 100mA 4
GND Pin Current 4.5 9 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 500mA 4
GND Pin Current 23 46 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1.5A 4
GND Pin Current 44 88 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 2.1A 4
Quiescent Current in Shutdown 0.1 1 µA VIN = 40V, VSHDN = 0V 4
Shutdown Threshold (OFF to ON) 1.12 1.22 1.32 V VOUT = Off to On 4
Shutdown Threshold (ON to OFF) 0.85 1.03 V VOUT = On to Off 4
SHDN Pin Current 15 35 µA 1.55V < VIN < 40V, VSHDN = 40V 4
TEMP Error -0.09 0.09 V 0°C < TJ < 125°C, ITEMP = 0 4
ITEMP Thermal Limit Current Threshold ITEMP 95 100 105 µA 25°C < TJ < 125°C 4
IMON Output Current IMON 5 20 75 µA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 20mA, RMON = 1kΩ 4
IMON Output Current IMON 440 500 560 µA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 500mA, RMON = 330Ω 4
IMON Output Current IMON 0.95 1 1.05 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1A, RMON = 330Ω 4
IMON Output Current IMON 1.43 1.5 1.57 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1.5A, RMON = 330Ω 4
IMON Output Current IMON 2.02 2.1 2.18 mA VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 2.1A, RMON = 330Ω 4
Output Current Sharing Error -10 0 10 % RMON = 330Ω, IOUT(MASTER) = 2.1A 4
TRACK Pin Pull-Up Current 7 15 25 µA VTRACK = 750mV 4
RPWRGD Reference Voltage 390 400 410 mV 1.55V < VIN < 40V 4
RPWRGD Reference Current 48.75 50 51.25 µA 1.55V < VIN < 40V 4
PWRGD VOL 55 200 mV IPWRGD = 200µA (Fault Condition) 4
PWRGD Internal Time Delay 8 17 25 µs VOL to VOH (Rising Edge) 4
PWRGD Pin Leakage Current 1 µA VPWRGD = 32V, VRPWRGD = 500mV 4
CDC Reference Voltage 390 400 410 mV 1.55V < VIN < 40V, IMON = 0V 4
CDC/VIMON Voltage Gain 0.32 0.333 0.343 V/V 1.55V < VIN < 40V, 0 < ICDC < 20µA, VIMON = 800mV to 0 4
Ripple Rejection 65 80 dB VIN = 1.9V (AVG), VRIPPLE = 0.5VP-P, VOUT = 1V, fRIPPLE = 120Hz, ILOAD = 2.1A 4
Internal Current Limit 2.2 2.4 2.9 A VIN = 1.55V 4
Internal Current Limit 2.2 A VIN = VOUT(NOMINAL) + 0.55V, ∆VOUT = -5% 4
ILIM Threshold Voltage 775 800 825 mV 1.55V < VIN < 40V 4
Input Reverse-Leakage Current 2 mA VIN = -40V, VOUT = 0 4
Reverse-Output Current 1 10 µA VOUT = 32V, VIN = 0, VSHDN = 0 4
IN Pin Voltage -45 45 V 2
OUT Pin Voltage -36 36 V 2
Input-to-Output Differential Voltage -45 45 V Note 2 2
SET Pin Voltage -0.3 36 V 2
SHDN Pin Voltage -45 45 V 2
CDC Pin Current 8 mA Internally clamped, current into pin 2
IMON Pin Voltage -0.3 7 V 2
ILIM Pin Voltage -0.3 2 V 2
TEMP Pin Voltage 0 5 V Note 1 2
PWRGD Pin Voltage -0.3 36 V 2
RPWRGD Pin Voltage -0.3 36 V 2
Operating Junction Temperature TJ -40 125 °C I-Grade (Notes 3, 5, 12) 2
Storage Temperature Range -65 150 °C 2
Junction-to-Ambient Thermal Resistance θJA 25 33 °C/W DHD package; 25°C/W to 33°C/W depending on topside copper area (Tables 2 and 3) 2
Junction-to-Case Thermal Resistance θJC 4.3 °C/W DHD package 2

CAD (KiCad official)

  • Symbol: LT3086IDHD#PBF
  • Footprint: Package_DFN_QFN:DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm
  • 3D model: DFN-16-EP(4x5) (KiCad packages3D, STEP)
  • 3D model files: lt3086idhd-pbf-etched.step / lt3086idhd-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3086idhd-pbf.step / lt3086idhd-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (34 pp, sha256 a2be733734e43ad9, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF