component
LT3082ETS8#TRMPBF
Public Made by Adomby adom
Analog Devices Linear Voltage Regulators (LDO), TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LT3082ETS8#TRMPBF
Analog Devices · Linear Voltage Regulators (LDO) · TSOT-23-8
LT3082ETS8#TRMPBF from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection to internal circuitry; the pin may be tied to IN, OUT, GND or left floating. |
| 2 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 3 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 4 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 5 | SET | passive | Error amplifier noninverting input with a fixed 10μA current source flowing out of the pin; a single resistor to GND programs VOUT over 0V to 38.5V. |
| 6 | NC | unconnected | No connection to internal circuitry; the pin may be tied to IN, OUT, GND or left floating. |
| 7 | IN | power_in | Supplies power to internal circuitry and output load current; it must be 1.2V to 1.4V above OUT depending on load current, and the absolute maximum is ±40V relative to SET and OUT. |
| 8 | IN | power_in | Supplies power to internal circuitry and output load current; it must be 1.2V to 1.4V above OUT depending on load current, and the absolute maximum is ±40V relative to SET and OUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SET Pin Current | ISET | 9.9 | 10 | 10.1 | μA | VIN = 2V, ILOAD = 1mA | 3 |
| SET Pin Current | ISET | 9.8 | 10 | 10.2 | μA | Over full operating temperature range; 2V ≤ VIN ≤ 40V, 1mA ≤ ILOAD ≤ 200mA | 3 |
| Offset Voltage (VOUT, VSET) | VOS | -2 | 2 | mV | VIN = 2V, ILOAD = 1mA | 3 | |
| Offset Voltage (VOUT, VSET) | VOS | -4 | 4 | mV | Over full operating temperature range; VIN = 2V, ILOAD = 1mA | 3 | |
| Load Regulation | ΔVOS | -0.5 | -2 | mV | Over full operating temperature range; ΔILOAD = 1mA to 200mA | 3 | |
| Line Regulation | ΔISET | 0.03 | 0.2 | nA/V | ΔVIN = 2V to 40V, ILOAD = 1mA | 3 | |
| Line Regulation | ΔVOS | 0.003 | 0.01 | mV/V | ΔVIN = 2V to 40V, ILOAD = 1mA | 3 | |
| Minimum Load Current | 300 | 500 | μA | Over full operating temperature range; 2V ≤ VIN ≤ 40V | 3 | ||
| Dropout Voltage | VIN, VOUT | 1.22 | 1.45 | V | ILOAD = 10mA, over full operating temperature range | 3 | |
| Dropout Voltage | VIN, VOUT | 1.3 | 1.65 | V | ILOAD = 200mA, over full operating temperature range | 3 | |
| Current Limit | 200 | 300 | mA | Over full operating temperature range; VIN = 5V, VSET = 0V, VOUT = -0.1V | 3 | ||
| IN Pin Voltage Relative to SET, OUT | -40 | 40 | V | Relative to SET, OUT | 2 | ||
| SET Pin Current | -15 | 15 | mA | Note 6 | 2 | ||
| SET Pin Voltage (Relative to OUT) | -10 | 10 | V | Relative to OUT, Note 6 | 2 | ||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | ST, TS8 packages only; soldering 10 sec | 2 | |||
| Operating Junction Temperature Range (E grade) | TJ | -40 | 125 | °C | E grade; Notes 2, 8 | 2 | |
| Input Voltage Range | VIN | 1.2 | 40 | V | Wide input voltage range, per Features | 1 | |
| Output Voltage Range | VOUT | 0 | 38.5 | V | Set by single resistor RSET; per Pin Functions | 7 | |
| Output Capacitor | COUT | 2.2 | μF | Minimum for stability, ceramic or low ESR | 9 | ||
| Output Capacitor ESR | ESR | 0.5 | Ω | Minimum output capacitor of 2.2μF with ESR of 0.5Ω or less recommended | 9 | ||
| SET Pin Bypass Capacitor across RSET | CSET | 1 | μF | Capacitors up to 1μF can be used across voltage setting resistor | 9 | ||
| Maximum Junction Temperature | TJMAX | 125 | °C | TS8 package header | 2 | ||
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | 57 | °C/W | TS8 8-lead SOT-23 package header; device on 4-layer board per Table 4 layout | 2 | ||
| Thermal Resistance, Junction-to-Case (TS8) | θJC | 15 | °C/W | TS8 8-lead SOT-23 package header | 2 | ||
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | 54 | °C/W | Table 4: 2500mm² topside copper, 2500mm² backside, 2500mm² board area | 13 | ||
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | 57 | °C/W | Table 4: 225mm² topside copper, 2500mm² backside, 2500mm² board area | 13 | ||
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | 63 | °C/W | Table 4: 100mm² topside copper, 2500mm² backside, 2500mm² board area | 13 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | pins (Pins 1, 2/Pin 2) at the PCB. The amount of copper area | 7 |
CAD (KiCad official)
- Symbol:
LT3082ETS8#TRMPBF - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
lt3082ets8-trmpbf-etched.step/lt3082ets8-trmpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3082ets8-trmpbf.step/lt3082ets8-trmpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
dd62a34c279123c4, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LT3082ETS8#TRMPBF
**Analog Devices** · Linear Voltage Regulators (LDO) · TSOT-23-8
LT3082ETS8#TRMPBF from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection to internal circuitry; the pin may be tied to IN, OUT, GND or left floating. |
| 2 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 3 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 4 | OUT | power_out | Regulated power output; the LT3082 requires a 0.5mA minimum load current or the output will not regulate. |
| 5 | SET | passive | Error amplifier noninverting input with a fixed 10μA current source flowing out of the pin; a single resistor to GND programs VOUT over 0V to 38.5V. |
| 6 | NC | unconnected | No connection to internal circuitry; the pin may be tied to IN, OUT, GND or left floating. |
| 7 | IN | power_in | Supplies power to internal circuitry and output load current; it must be 1.2V to 1.4V above OUT depending on load current, and the absolute maximum is ±40V relative to SET and OUT. |
| 8 | IN | power_in | Supplies power to internal circuitry and output load current; it must be 1.2V to 1.4V above OUT depending on load current, and the absolute maximum is ±40V relative to SET and OUT. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Power Supply Chip |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SET Pin Current | ISET | 9.9 | 10 | 10.1 | μA | VIN = 2V, ILOAD = 1mA | 3 |
| SET Pin Current | ISET | 9.8 | 10 | 10.2 | μA | Over full operating temperature range; 2V ≤ VIN ≤ 40V, 1mA ≤ ILOAD ≤ 200mA | 3 |
| Offset Voltage (VOUT, VSET) | VOS | -2 | | 2 | mV | VIN = 2V, ILOAD = 1mA | 3 |
| Offset Voltage (VOUT, VSET) | VOS | -4 | | 4 | mV | Over full operating temperature range; VIN = 2V, ILOAD = 1mA | 3 |
| Load Regulation | ΔVOS | | -0.5 | -2 | mV | Over full operating temperature range; ΔILOAD = 1mA to 200mA | 3 |
| Line Regulation | ΔISET | | 0.03 | 0.2 | nA/V | ΔVIN = 2V to 40V, ILOAD = 1mA | 3 |
| Line Regulation | ΔVOS | | 0.003 | 0.01 | mV/V | ΔVIN = 2V to 40V, ILOAD = 1mA | 3 |
| Minimum Load Current | | | 300 | 500 | μA | Over full operating temperature range; 2V ≤ VIN ≤ 40V | 3 |
| Dropout Voltage | VIN, VOUT | | 1.22 | 1.45 | V | ILOAD = 10mA, over full operating temperature range | 3 |
| Dropout Voltage | VIN, VOUT | | 1.3 | 1.65 | V | ILOAD = 200mA, over full operating temperature range | 3 |
| Current Limit | | 200 | 300 | | mA | Over full operating temperature range; VIN = 5V, VSET = 0V, VOUT = -0.1V | 3 |
| IN Pin Voltage Relative to SET, OUT | | -40 | | 40 | V | Relative to SET, OUT | 2 |
| SET Pin Current | | -15 | | 15 | mA | Note 6 | 2 |
| SET Pin Voltage (Relative to OUT) | | -10 | | 10 | V | Relative to OUT, Note 6 | 2 |
| Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Lead Temperature (Soldering, 10 sec) | | | | 300 | °C | ST, TS8 packages only; soldering 10 sec | 2 |
| Operating Junction Temperature Range (E grade) | TJ | -40 | | 125 | °C | E grade; Notes 2, 8 | 2 |
| Input Voltage Range | VIN | 1.2 | | 40 | V | Wide input voltage range, per Features | 1 |
| Output Voltage Range | VOUT | 0 | | 38.5 | V | Set by single resistor RSET; per Pin Functions | 7 |
| Output Capacitor | COUT | 2.2 | | | μF | Minimum for stability, ceramic or low ESR | 9 |
| Output Capacitor ESR | ESR | | | 0.5 | Ω | Minimum output capacitor of 2.2μF with ESR of 0.5Ω or less recommended | 9 |
| SET Pin Bypass Capacitor across RSET | CSET | | | 1 | μF | Capacitors up to 1μF can be used across voltage setting resistor | 9 |
| Maximum Junction Temperature | TJMAX | | | 125 | °C | TS8 package header | 2 |
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | | 57 | | °C/W | TS8 8-lead SOT-23 package header; device on 4-layer board per Table 4 layout | 2 |
| Thermal Resistance, Junction-to-Case (TS8) | θJC | | 15 | | °C/W | TS8 8-lead SOT-23 package header | 2 |
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | | 54 | | °C/W | Table 4: 2500mm² topside copper, 2500mm² backside, 2500mm² board area | 13 |
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | | 57 | | °C/W | Table 4: 225mm² topside copper, 2500mm² backside, 2500mm² board area | 13 |
| Thermal Resistance, Junction-to-Ambient (TS8) | θJA | | 63 | | °C/W | Table 4: 100mm² topside copper, 2500mm² backside, 2500mm² board area | 13 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | pins (Pins 1, 2/Pin 2) at the PCB. The amount of copper area | 7 |
## CAD (KiCad official)
- Symbol: `LT3082ETS8#TRMPBF`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `lt3082ets8-trmpbf-etched.step` / `lt3082ets8-trmpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lt3082ets8-trmpbf.step` / `lt3082ets8-trmpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/3082f.pdf) (20 pp, sha256 `dd62a34c279123c4`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lt3082ets8-trmpbf-datasheet.pdf)