component
LT3071EUFD#PBF
Public Made by Adomby adom
Analog Devices Linear Voltage Regulators (LDO), QFN-28-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "LT3071EUFD#PBF",
"brief": "Analog Devices Linear Voltage Regulators (LDO), QFN-28-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"mpn": "LT3071EUFD#PBF",
"manufacturer": "Analog Devices",
"package": "QFN-28-EP(4x5)",
"pin_count": 29,
"category": "Power Management ICs",
"subcategory": "Linear Voltage Regulators (LDO)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/lt3071.pdf",
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"pins": [
{
"number": "1",
"name": "VIOC",
"type": "output",
"description": "Output of the tracking function that drives the buck regulator to hold the LT3071 input at VOUT + 300mV, to maximize efficiency and minimize power dissipation."
},
{
"number": "2",
"name": "PWRGD",
"type": "output",
"description": "Open-drain NMOS power-good output that pulls low on VOUT below 90% of nominal on rising edge, VOUT below 85% for more than 25µs, junction above about 145°C, VBIAS below UVLO, or OUT-to-IN reverse current."
},
{
"number": "3",
"name": "REF/BYP",
"type": "output",
"description": "Output of the bandgap reference with approximately 19kΩ impedance that must not be externally loaded; a 10nF bypass to GND decreases output noise and provides reference soft-start."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "5",
"name": "IN",
"type": "power_in",
"description": "Input supply to the high current pass transistor; all IN pins must be tied together and bypassed with at least 47µF."
},
{
"number": "6",
"name": "IN",
"type": "power_in",
"description": "Input supply to the high current pass transistor; all IN pins must be tied together and bypassed with at least 47µF."
},
{
"number": "7",
"name": "IN",
"type": "power_in",
"description": "Input supply to the high current pass transistor; all IN pins must be tied together and bypassed with at least 47µF."
},
{
"number": "8",
"name": "IN",
"type": "power_in",
"description": "Input supply to the high current pass transistor; all IN pins must be tied together and bypassed with at least 47µF."
},
{
"number": "9",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "11",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "13",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "15",
"name": "OUT",
"type": "power_out",
"description": "Regulated output supplying the load; all OUT pins must be tied together and a minimum 15µF ceramic output capacitance is required for stability."
},
{
"number": "16",
"name": "OUT",
"type": "power_out",
"description": "Regulated output supplying the load; all OUT pins must be tied together and a minimum 15µF ceramic output capacitance is required for stability."
},
{
"number": "17",
"name": "OUT",
"type": "power_out",
"description": "Regulated output supplying the load; all OUT pins must be tied together and a minimum 15µF ceramic output capacitance is required for stability."
},
{
"number": "18",
"name": "OUT",
"type": "power_out",
"description": "Regulated output supplying the load; all OUT pins must be tied together and a minimum 15µF ceramic output capacitance is required for stability."
},
{
"number": "19",
"name": "SENSE",
"type": "input",
"description": "Kelvin sense input to the inverting input of the error amplifier, with input current from 50µA typical at VOUT = 0.8V to 300µA typical at VOUT = 1.8V."
},
{
"number": "20",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "21",
"name": "IMON",
"type": "output",
"description": "Output current monitor sourcing a current typically equal to IOUT/2500 (400µA per amp of output current); if unused, tie to VBIAS."
},
{
"number": "22",
"name": "MARGA",
"type": "input",
"description": "Analog margining input that adjusts VOUT over ±10%: GND gives −10%, 1.2V gives +10%; float it or terminate with 1nF to GND if unused."
},
{
"number": "23",
"name": "VO0",
"type": "input",
"description": "Three-state output voltage select pin that combines with VO1 and VO2 to select VOUT from 0.8V to 1.8V in 50mV steps; logic low threshold is below 250mV."
},
{
"number": "24",
"name": "VO1",
"type": "input",
"description": "Three-state output voltage select pin that combines with VO0 and VO2 to select VOUT from 0.8V to 1.8V in 50mV steps; VOUT is limited to 1.8V maximum by internal override when VO2 is high."
},
{
"number": "25",
"name": "VO2",
"type": "input",
"description": "Three-state output voltage select pin that combines with VO0 and VO1 to select VOUT from 0.8V to 1.8V in 50mV steps; logic high threshold is above VBIAS − 250mV."
},
{
"number": "26",
"name": "GND",
"type": "power_in",
"description": "Ground pin that must be tied to exposed pad Pin 29 and the other GND pins for proper electrical and thermal performance."
},
{
"number": "27",
"name": "BIAS",
"type": "power_in",
"description": "Bias supply for internal control circuitry and pass transistor drive, requiring 2.2V ≤ VBIAS ≤ 3.6V and VBIAS ≥ (1.25 • VOUT + 1V) with at least 2.2µF bypass."
},
{
"number": "28",
"name": "EN",
"type": "input",
"description": "Enable input that turns the output device on or off; pulling low places the LT3071 in a low power nap mode, and it must connect to BIAS if unused."
},
{
"number": "29",
"name": "GND",
"type": "power_in",
"description": "Exposed pad ground that must be soldered to the PCB ground and tied to all GND pins of the package for electrical and thermal performance."
}
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"Package": "QFN-28-EP(4x5)",
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"appearance": {
"contacts": {
"quote": "Table 3, UFD Plastic Package, 28-Lead QFN COPPER AREA",
"page": 22,
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"material": "COPPER"
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"name": "IN, OUT Pin Voltage",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
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{
"name": "Operating Junction Temperature LT3071E",
"symbol": "TJ",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 125,
"conditions": "LT3071E/LT3071I",
"source_page": 2,
"source": "datasheet"
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{
"name": "Storage Temperature Range",
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"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
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"name": "IN Pin Voltage Range",
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"kind": "recommended_operating",
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"min": 0.95,
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"max": 3,
"conditions": "VIN ≥ VOUT + 150mV, IOUT = 5A",
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"source": "datasheet"
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{
"name": "BIAS Pin Voltage Range",
"symbol": "VBIAS",
"kind": "recommended_operating",
"unit": "V",
"min": 2.2,
"typ": null,
"max": 3.6,
"conditions": "Note 3",
"source_page": 2,
"source": "datasheet"
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{
"name": "Thermal Resistance Junction-to-Ambient",
"symbol": "θJA",
"kind": "thermal",
"unit": "°C/W",
"min": 30,
"typ": null,
"max": 35,
"conditions": "QFN package, copper area dependent",
"source_page": 2,
"source": "datasheet"
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{
"name": "Regulated Output Voltage",
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"kind": "electrical",
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"min": 0.792,
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"conditions": "VOUT = 0.8V, 10mA ≤ IOUT ≤ 5A, 1.05V ≤ VIN ≤ 1.25V",
"source_page": 2,
"source": "datasheet"
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{
"name": "Regulated Output Voltage",
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"min": 0.891,
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"conditions": "VOUT = 0.9V, 10mA ≤ IOUT ≤ 5A, 1.15V ≤ VIN ≤ 1.35V",
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{
"name": "Regulated Output Voltage",
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"conditions": "VOUT = 1V, 10mA ≤ IOUT ≤ 5A, 1.25V ≤ VIN ≤ 1.45V",
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"name": "Regulated Output Voltage",
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"name": "Regulated Output Voltage",
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{
"name": "Regulated Output Voltage Margining",
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"name": "Regulated Output Voltage Margining",
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{
"name": "Line Regulation to VIN",
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{
"name": "Line Regulation to VBIAS",
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{
"name": "Line Regulation to VBIAS",
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"name": "Load Regulation",
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"name": "Load Regulation",
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"conditions": "∆IOUT = 10mA to 5A, VBIAS = 2.5V, VIN = 1.25V, VOUT = 1.0V",
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"source": "datasheet"
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{
"name": "Load Regulation",
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"conditions": "∆IOUT = 10mA to 5A, VBIAS = 3.3V, VIN = 1.75V, VOUT = 1.5V",
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{
"name": "Load Regulation",
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{
"name": "Dropout Voltage",
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